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參數(shù)資料
| 型號： | AT17C002A-10QI |
| 廠商： | ATMEL CORP |
| 元件分類： | DRAM |
| 英文描述： | FPGA Configuration EEPROM Memory |
| 中文描述： | 2M X 1 CONFIGURATION MEMORY, PQFP32 |
| 封裝： | 1 MM HEIGHT, PLASTIC, TQFP-32 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 242K |
| 代理商： | AT17C002A-10QI |
5
AT17C/LV002A
2280B
–
08/01
The READY pin is available as an open-collector indicator of the device
’
s reset status; it is
driven Low while the device is in its power-on reset cycle and released (tri-stated) when the
cycle is complete. It can be used to hold the FPGA device in reset while it is completing its
power-on reset but it cannot be used to effectively delay configuration (i.e., the output is
released well before the system V
CC
has stabilized).
The first AT17A Series device clocks all subsequent AT17A Series devices until configuration
is complete. Once all configuration data is transferred and nCS on the first AT17A Series
device is driven High by CONF_DONE on the FPGA devices, the first AT17A Series device
clocks 16 additional cycles to initialize the FPGA device before going into zero-power (idle)
state. If nCS on the first AT17A Series device is driven High before all configuration data is
transferred
–
or if the nCS is not driven High after all configuration data is transferred
–
nSTA-
TUS is driven Low, indicating a configuration error.
AT17A Series
Reset Polarity
The AT17A Series Configurator allows the user to program the polarity of the OE pin as either
RESET/OE or RESET/OE. For more details, please reference the
“
Programming Specification
for Atmel
’
s FPGA Configuration EEPROMs
”
application note.
Programming
Mode
The programming mode is entered by bringing SER_EN Low. In this mode the chip can be
programmed by the 2-wire serial interface. The programming is done at V
CC
supply only. Pro-
gramming supervoltages are generated inside the chip. See the
“
Programming Specification
for Atmel
’
s Configuration EEPROMs
”
application note for further information. The AT17 A-
series parts are read/write at 5V nominal. The AT17LV A-series parts are read/write at 3.3V
nominal.
Standby Mode
The AT17A Series Configurator enters a low-power standby mode whenever nCS is asserted
High. In this mode, the configuration consumes less than 0.5 mA of current at 5V. The output
remains in a high-impedance state regardless of the state of the OE input.
相關PDF資料 |
PDF描述 |
|---|---|
| AT17C020 | 2M bit FPGA Configuration EEPROM Memory(2M位 FPGA配置EEPROM存儲器) |
| AT17LV020 | 2M bit FPGA Configuration EEPROM Memory(2M位 FPGA配置EEPROM存儲器) |
| AT17C128-10JC | FPGA Configuration E2PROM |
| AT17LV65-10JC | FPGA Configuration E2PROM |
| AT17LV65-10JI | FPGA Configuration E2PROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AT17C010 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration E2PROM Memory |
| AT17C010-10 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:FPGA Configuration E2PROM Memory |
| AT17C010-10CC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configuration EEPROM |
| AT17C010-10CI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Configuration EEPROM |
| AT17C010-10JC | 功能描述:FPGA-配置存儲器 1M 15MHz 5V RoHS:否 制造商:Altera Corporation 存儲類型:Flash 存儲容量:1.6 Mbit 工作頻率:10 MHz 電源電壓-最大:5.25 V 電源電壓-最小:3 V 電源電流:50 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:PLCC-20 |
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