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參數(shù)資料
| 型號： | ASM5I9352G-32-LT |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| 中文描述： | 9352 SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 1 MM HEIGHT, GREEN, LQFP-32 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 475K |
| 代理商： | ASM5I9352G-32-LT |
July 2005
rev 0.2
ASM5I9352
2.5V or 3.3V, 200 MHz, 11-Output Zero Delay Buffer
8 of
12
Notice: The information in this document is subject to change without notice.
Figure 1. AC Test Reference for V
DD
= 3.3V / 2.5V
Figure 2. LVCMOS Propagation Delay t(
φ
), Static Phase Offset
DC = tP / T0 x 100%
Figure 3. Output Duty Cycle (DC)
Figure 4. Output-to-Output Skew , t
sk(O)
LVCMOS_CLK
VDD
VDD/2
GND
t
P
T0
t
SK(0)
VDD
VDD/2
GND
VDD
VDD/2
GND
Pulse
Generator
Z = 50 ohm
Zo = 50 ohm
R
T
= 50 ohm
VTT
VTT
R
T
= 50 ohm
Zo = 50 ohm
LVCMOS_CLK
VDD
VDD
VDD/2
VDD/2
GND
GND
t(
φ
)
FB_IN
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM5I9352 | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352-32-ET | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352-32-LT | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I961CG-32-ET | Low Voltage Zero Delay Buffer |
| ASM5I961CG-32-LT | Low Voltage Zero Delay Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM5I961C | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961C-32-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961C-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961CG-32-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
| ASM5I961CG-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Voltage Zero Delay Buffer |
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