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參數(shù)資料
| 型號(hào)： | ASM5I9351-32-LT |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 2.5V or 3.3V, 200 MHz, 9-Output Zero Delay Buffer |
| 中文描述： | 9351 SERIES, PLL BASED CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 1 MM HEIGHT, LQFP-32 |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 522K |
| 代理商： | ASM5I9351-32-LT |
July 2005
rev 0.2
ASM5I9351
2.5V or 3.3V, 200 MHz, 9-Output Zero Delay Buffer
5 of 13
Notice: The information in this document is subject to change without notice.
DC Electrical Specifications
(V
DD
= 2.5V ± 5%, T
A
= -40°C to +85°C)
Parameter
V
IL
V
IH
V
PP
V
CMR
V
OL
V
OH
I
IL
I
IH
I
DDA
I
DDQ
Description
Condition
Min
-
1.7
250
1.0
Typ
-
-
-
-
-
-
-
-
5
-
180
210
4
18
Max
0.7
V
DD
+0.3
1000
Unit
V
V
mV
V
Input Voltage, Low
Input Voltage, High
Peak-Peak Input Voltage
Common Mode Range
1
Output Voltage, Low
2
Output Voltage, High
2
Input Current, Low
3
Input Current, High
3
PLL Supply Current
Quiescent Supply Current
LVCMOS
LVCMOS
LVPECL
LVPECL
V
DD
– 0.6
0.6
-
-100
100
10
7
-
-
-
22
I
OL
= 15mA
I
OH
= –15mA
V
IL
= V
SS
V
IL
= V
DD
AVDD only
All VDD pins except AVDD
Outputs loaded @ 100 MHz
Outputs loaded @ 200 MHz
-
V
V
μA
μA
mA
mA
1.8
-
-
-
-
-
-
-
14
I
DD
Dynamic Supply Current
mA
C
IN
Z
OUT
Note: 1
V
CMR
(DC) is the crossing point of the differential input signal. Normal operation is obtained when the crossing point is within the V
CMR
range and the
input swing is within the V
(DC) specification.
2.Driving one 50
parallel terminated transmission line to a termination voltage of V
TT
. Alternatively, each output drives up to two 50
series terminated
transmission lines.
3.Inputs have pull-up or pull-down resistors that affect the input current.
Input Pin Capacitance
Output Impedance
pF
DC Electrical Specifications
(V
DD
= 3.3V ± 5%, T
A
= -40°C to +85°C)
Parameter
V
IL
V
IH
V
PP
V
CMR
Description
Condition
Min
-
2.0
250
1.0
Typ
-
-
-
-
-
-
-
-
-
5
-
270
300
4
Max
0.8
V
DD
+0.3
1000
Unit
V
V
mV
V
Input Voltage, Low
Input Voltage, High
Peak-Peak Input Voltage
Common Mode Range
1
LVCMOS
LVCMOS
LVPECL
LVPECL
V
DD
– 0.6
0.55
0.30
-
–100
100
10
7
-
-
-
I
OL
= 24 mA
I
OL
= 12 mA
I
OH
= –24 mA
V
IL
= V
SS
V
IL
= V
DD
AVDD only
All VDD pins except AVDD
Outputs loaded @ 100 MHz
Outputs loaded @ 200 MHz
-
-
V
OL
Output Voltage, Low
2
V
V
OH
I
IL
I
IH
I
DDA
I
DDQ
Output Voltage, High
2
Input Current, Low
3
Input Current, High
3
PLL Supply Current
Quiescent Supply Current
2.4
-
-
-
-
-
-
-
V
μA
μA
mA
mA
I
DD
Dynamic Supply Current
mA
C
IN
Input Pin Capacitance
pF
Z
OUT
Note: 1
V
CMR
(DC) is the crossing point of the differential input signal. Normal operation is obtained when the crossing point is within the V
CMR
range and the
input swing is within the V
PP
(DC) specification.
2.Driving one 50
parallel terminated transmission line to a termination voltage of V
TT
. Alternatively, each output drives up to two 50
series terminated
transmission lines.
3.Inputs have pull-up or pull-down resistors that affect the input current.
Output Impedance
12
15
18
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM5I9352G-32-ET | CONNECTOR ACCESSORY |
| ASM5I9352G-32-LT | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352 | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352-32-ET | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352-32-LT | 2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM5I9351G-32-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200 MHz, 9-Output Zero Delay Buffer |
| ASM5I9351G-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200 MHz, 9-Output Zero Delay Buffer |
| ASM5I9352 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352-32-ET | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
| ASM5I9352-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V or 3.3V, 200 MHz, 11 Output Zero Delay Buffer |
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