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參數資料
| 型號： | ASM3P623S00DG-16-SR |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | Zero Cycle Slip Peak EMI reduction IC |
| 中文描述： | 3P SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.150 INCH, GREEN, SOIC-16 |
| 文件頁數： | 7/16頁 |
| 文件大?。?/td> | 301K |
| 代理商： | ASM3P623S00DG-16-SR |
July 2005
rev 1.0
Test Circuits
ASM3P623S00A/B/C/D/E/F
Zero Cycle Slip Peak EMI Reduction IC
7 of 16
Notice: The information in this document is subject to change without notice.
-Nd
One clock cycle
N=1
+Nd
Input
Modulated
Output
Nd represents the differential cycle slip
when spread spectrum is ON
Nd = ± 0.125 in the example
Differential cycle slip
V
DD
V
DD
GND
GND
CLKOUT
CLOAD
OUTPUTS
TEST CIRCUIT # 1
0.1uF
0.1uF
相關PDF資料 |
PDF描述 |
|---|---|
| ASM3I623S00DG-16-SR | Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-ST | Zero Cycle Slip Peak EMI reduction IC |
| ASM3I623S00DG-16-ST | Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-TR | Zero Cycle Slip Peak EMI reduction IC |
| ASM3I623S00DG-16-TR | Zero Cycle Slip Peak EMI reduction IC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ASM3P623S00DG-16-ST | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-TR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-TT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00E | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Timing-Safe? Peak EMI reduction IC |
| ASM3P623S00EF-16-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
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