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參數(shù)資料
| 型號(hào)： | ASM3P623S00DG-16-SR |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | Zero Cycle Slip Peak EMI reduction IC |
| 中文描述： | 3P SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封裝： | 0.150 INCH, GREEN, SOIC-16 |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大?。?/td> | 301K |
| 代理商： | ASM3P623S00DG-16-SR |
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July 2005
rev 1.0
Operating Conditions for ASM3P623S00A/B/C and ASM3P623S00D/E/F Devices
ASM3P623S00A/B/C/D/E/F
Zero Cycle Slip Peak EMI Reduction IC
5 of 16
Notice: The information in this document is subject to change without notice.
Parameter
Description
Min
Max
Unit
VDD
Supply Voltage
3.0
3.6
V
T
A
Operating Temperature (Ambient Temperature)
0
70
°C
C
L
Load Capacitance
30
pF
C
IN
Input Capacitance
7
pF
Electrical Characteristics for ASM3P623S00A/B/C and ASM3P623S00D/E/F
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
V
IL
Input LOW Voltage
5
Input HIGH Voltage
5
0.8
V
V
IH
2.0
V
I
IL
Input LOW Current
V
IN
= 0V
50
μA
I
IH
Input HIGH Current
Output LOW Voltage
6
Output HIGH Voltage
6
V
IN
= VDD
100
μA
V
OL
I
OL
= 8mA
0.4
V
V
OH
I
OH
= -8mA
2.4
V
I
DD
Supply Current
Unloaded outputs
15
mA
Z
o
Output Impedance
23
Switching Characteristics for ASM3P623S00A/B/C and ASM3P623S00D/E/F
7
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
1/t
1
Output Frequency
Duty Cycle
6
= (t
2
/ t
1
) * 100
Output Rise Time
6
Output Fall Time
6
Output-to-output skew
6
30pF load
20
50
MHz
Measured at VDD/2
40
50
60
%
t
3
Measured between 0.8V and 2.0V
2.5
nS
t
4
Measured between 2.0V and 0.8V
2.5
nS
t
5
All outputs equally loaded
250
pS
t
6
Delay, CLKIN Rising Edge to
CLKOUT Rising Edge
6
Device-to-Device Skew
6
Measured at VDD /2
±350
pS
t
7
Measured at VDD/2 on the CLKOUT pins
of the device
700
pS
t
J
Cycle-to-cycle jitter
6
PLL Lock Time
6
Loaded outputs
200
pS
t
LOCK
Stable power supply, valid clock presented
on CLKIN pin
1.0
mS
Notes:
5. CLKIN input has a threshold voltage of VDD/2
6. Parameter is guaranteed by design and characterization. Not 100% tested in production
7. All parameters specified with loaded outputs.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ASM3I623S00DG-16-SR | Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-ST | Zero Cycle Slip Peak EMI reduction IC |
| ASM3I623S00DG-16-ST | Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-TR | Zero Cycle Slip Peak EMI reduction IC |
| ASM3I623S00DG-16-TR | Zero Cycle Slip Peak EMI reduction IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM3P623S00DG-16-ST | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-TR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00DG-16-TT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
| ASM3P623S00E | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Timing-Safe? Peak EMI reduction IC |
| ASM3P623S00EF-16-SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Zero Cycle Slip Peak EMI reduction IC |
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