參數(shù)資料
型號: ASM3P2780AF-08TR
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Low Power Peak EMI Reducing Solution
中文描述: 50 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: ROHS COMPLIANT, TSSOP-8
文件頁數(shù): 4/12頁
文件大?。?/td> 180K
代理商: ASM3P2780AF-08TR
September 2005
rev 1.5
Absolute Maximum Ratings
Symbol
V
DD
, V
IN
ASM3P2780A
Low Power Peak EMI Reducing Solution
4 of 12
Notice: The information in this document is subject to change without notice.
Parameter
Rating
-0.5 to +7.0
Unit
V
Voltage on any pin with respect to Ground
T
STG
Storage temperature
-65 to +125
°C
T
A
Operating temperature
0 to 70
°C
T
s
Max. Soldering Temperature (10 sec)
260
°C
T
J
Junction Temperature
150
°C
T
DV
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability
2
KV
DC Electrical Characteristics for 2.5V Supply
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol
Parameter
V
IL
Input low voltage
Min
V
SS
- 0.3
Typ
-
Max
0.8
Unit
V
V
IH
Input high voltage
2.0
-
V
DD
+ 0.3
V
I
IL
Input low current
-
-
-35
μA
I
IH
Input high current
-
-
35
μA
I
XOL
XOUT output low current (@0.6V, V
DD
=2.5V)
-
3
-
mA
I
XOH
XOUT output high current (@1.8V, V
DD
=2.5V)
-
3
-
mA
V
OL
Output low voltage (V
DD
= 2.5 V, I
OL
= 8mA)
-
-
0.6
V
V
OH
Output high voltage (V
DD
= 2.5 V, I
OH
= 8mA)
1.8
-
-
V
I
DD
Static supply current*
-
-
10
uA
I
CC
Dynamic supply current (2.5V, 46MHz and no load)
-
4.0
-
mA
V
DD
Operating Voltage
2.375
2.5
2.625
V
t
ON
Power-up time (first locked cycle after power-up)**
-
-
5
mS
Z
OUT
Output impedance
-
50
-
* XIN /CLKIN pin and PD pin are pulled low
** V
DD
and XIN/CLKIN input are stable, PD pin is made high from low.
AC Electrical Characteristics for 2.5V Supply
Symbol
Parameter
Min
Typ
Max
Unit
CLKIN
Input frequency
30
-
50
MHz
ModOUT
Output frequency
30
-
-
0.7
-
50
-
-
1.6
MHz
Input Frequency = 30MHz
Input Frequency = 50MHz
± 1.10
± 0.65
1.3
f
d
Frequency Deviation
%
t
LH
*
Output rise time (measured from 0.7V to 1.7V)
nS
t
HL
*
Output fall time (measured from 1.7V to 0.7V)
0.4
0.8
1.0
nS
t
JC
Jitter (cycle to cycle)
-
-
200
pS
t
D
* t
LH
and t
HL
are measured into a capacitive load of 15pF
Output duty cycle
45
50
55
%
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