參數(shù)資料
型號: ASM3P2780AF-08TR
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: Low Power Peak EMI Reducing Solution
中文描述: 50 MHz, OTHER CLOCK GENERATOR, PDSO8
封裝: ROHS COMPLIANT, TSSOP-8
文件頁數(shù): 3/12頁
文件大?。?/td> 180K
代理商: ASM3P2780AF-08TR
September 2005
rev 1.5
Pin Configuration (8-pin SOIC and TSSOP Packages)
Pin Description
Pin#
Pin Name
Type
ASM3P2780A
Low Power Peak EMI Reducing Solution
3 of 12
Notice: The information in this document is subject to change without notice.
Description
1
XIN/CLKIN
I
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
used.
No connect.
2
XOUT
PD
NC
O
3
I
4
-
5
V
SS
P
Ground connection.
6
ModOUT
O
Spread spectrum clock output.
7
NC
-
No connect.
8
V
DD
P
Power supply for the entire chip.
Modulation Profile
Specifications
Description
Specification
30MHz < CLKIN < 50MHz
F
IN
/1280
For 2.5V Supply
Frequency Range
For 3.3V Supply
Modulation Equation
Frequency Deviation
±0.75% (Typ) @ 46MHz
V
SS
ModOUT
XIN / CLKIN
NC
XOUT
1
2
3
4
5
6
7
8
ASM3P2780A
PD
NC
V
DD
相關(guān)PDF資料
PDF描述
ASM3I2780AF-08TR Low Power Peak EMI Reducing Solution
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