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參數(shù)資料
| 型號： | ASM2I99446G-32-ET |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | CONV DC-DC 120W 48VIN 1.2V SMD |
| 中文描述： | 99446 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | 7 X 7 MM, GREEN, TQFP-32 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 575K |
| 代理商： | ASM2I99446G-32-ET |
July 2005
rev 0.4
ASM2I99446
2.5V and 3.3V LVCMOS Clock Distribution Buffer 8 of 14
Notice: The information in this document is subject to change without notice.
Figure 6. CCLK0, 1 ASM2I99446 AC test reference for V
CC
= 3.3V and V
CC
= 2.5V
Pulse
Generator
Z=50
Z
0
=50
Z
0
=50
R
T
=50
R
T
=50
V
TT
ASM2I99446
t
R
V
CC
= 3.3V V
CC
= 2.5V
2.4 1.8V
0.55 0.6V
t
F
Figure 7. Output Transition Time Test Reference
t
SK(LH)
V
OH
V
CC
÷2
GND
V
CC
V
CC
÷2
GND
The pin-to-pin skew is defined as the worst case
difference in propagation delay between any similar
delay path within a single device
Figure 9. Output–to–Output Skew t
SK(LH,HL)
t
SK(HL)
t
(LH)
CCLK
Q
X
V
CC
V
CC
÷2
GND
V
CC
÷2
GND
Figure 8. Propagation Delay (t
PD
) Test Reference
t
(HL)
V
CC
t
(LH)
CCLK
Q
X
V
CC
V
CC
÷2
GND
V
CC
÷2
GND
Figure 10. Propagation Delay (t
SK(P)
) Test Reference
t
(HL)
V
CC
t
SK(P)
│
t
PLH
-
t
PHL
│
The time from the PLL controlled edge to the
non-controlled edge, divided by the time
between PLL controlled edges, expressed as a
percentage.
Figure 11. Output Duty Cycle (DC)
Reference
V
CC
V
CC
÷2
GND
DC (t
P
÷T
0
Χ
100%)
t
P
T
0
T
N
T
N
+ 1
T
JIT(CC)
= |T
N
-T
N
+ 1|
The variation in cycle time of a signal between adjacent
cycles, over a random sample of adjacent cycle pairs
Figure 12. Cycle–to–Cycle Jitter
相關PDF資料 |
PDF描述 |
|---|---|
| ASM2I99446G-32-LR | 2.5V and 3.3V LVCMOS Clock Distribution Buffer |
| ASM2I99446G-32-LT | 2.5V and 3.3V LVCMOS Clock Distribution Buffer |
| ASM2I99447 | 3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer |
| ASM2I99448G-32-ER | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99448G-32-ET | 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ASM2I99446G-32-LR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V and 3.3V LVCMOS Clock Distribution Buffer |
| ASM2I99446G-32-LT | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V and 3.3V LVCMOS Clock Distribution Buffer |
| ASM2I99447 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer |
| ASM2I99448 | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
| ASM2I99448-32-ER | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer |
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