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參數(shù)資料
| 型號： | ASM1232LPU-T |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | MSOP-8 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 377K |
| 代理商： | ASM1232LPU-T |
ASM1232LP/LPS
Rev. 2 | Page 5 of 13 | www.onsemi.com
Application Information
Manual Reset Operation
Push-button switch input, PBRST, allows the user to
override the internal trip point detection circuits and issue
reset signals. The pushbutton input is debounced and is
pulled HIGH through an internal 40k
Ω resistor.
When PBRST is held LOW for the minimum time tPB, both
resets become active and remain active for a minimum
time period of 250ms after PBRST returns HIGH.
The debounced input is guaranteed to recognize pulses
greater than 20ms. No external pull-up resistor is
required, since PBRST is pulled HIGH by an internal
40kΩ resistor.
The PBRST can be driven from a TTL or CMOS logic line
or shorted to ground with a mechanical switch.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ASM1233A | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Power, 3.3V, uP Reset, Active LOW, Open-Drain Output |
| ASM1233A-10 | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Power, 5V/3.3V, μP Reset, Active LOW, Open-Drain Output |
| ASM1233A-15 | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Power, 5V/3.3V, μP Reset, Active LOW, Open-Drain Output |
| ASM1233A-5 | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Power, 5V/3.3V, μP Reset, Active LOW, Open-Drain Output |
| ASM1233AZ-10 | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Power, 5V/3.3V, μP Reset, Active LOW, Open-Drain Output |
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