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參數(shù)資料
| 型號： | AS9C25256M2018L-166TI |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | TERM. F/O CABLE SC-SC/ DPLX/RISER/1M/BLUE |
| 中文描述： | 256K X 18 DUAL-PORT SRAM, 10 ns, PQFP144 |
| 封裝： | TQFP-144 |
| 文件頁數(shù)： | 14/30頁 |
| 文件大?。?/td> | 1100K |
| 代理商： | AS9C25256M2018L-166TI |
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AS9C25512M2018L
AS9C25256M2018L
9/24/04, v.1.2
Alliance Semiconductor
P. 14 of 30
Timing wave form read/write cycle
[7]
Notes:
1. Both Flow-through and Pipeline Inputs/Outputs indicated.A particular port is configured in Flow-through mode if PL/FT for that port is driven low,
and in Pipeline mode if PL/FT is driven high or left unconnected.
2. Parameters t
CYC
,t
CH
and t
CL
are different in Flow-through and Pipeline modes of operation.(Refer AC Timing characteristics)
3. CE is an internal signal.CE = H implies 'Chip is Deselected' (CE0 = H or CE1 =L), CE = L implies 'Chip is Selected' (CE0 = L and CE1 =H).
Timings indicated for CE hold good for CE0 and CE1
4. BEn refers to any one of the 2 byte controls [n = 1 or 0] and DATA OUT refers to the corresponding Byte.
5. Counter set in “Load” mode (ADS = L,INC = X,RPT = H).
6. OE is an asynchronous input.
7. All timings are similar for both ports.
8. Invalid write. Memory Content of the selected location may get corrupted and should be re-written before future readback.
9. Write (A11) is invalid in Pipeline mode and Write (A8) is invalid in Flow-through mode. Memory Content of the selected location may get corrupted and should be re-written
before future readback.
CLK
CE
[3]
ADDRESS
[5]
OE
[6]
[Pipeline Mode]
BEn
[4]
R/W
DATA IN
[1]
[Pipeline Mode]
DATA IN
[1]
[Flow-through Mode]
[Pipeline Mode]
DATA OUT
[1]
DATA OUT
[1]
[Flow-through Mode]
t
CEH
t
CES
D3
D6
Q1
Q2
Q1
A1
A2
t
CYC
[2]
t
CL
t
CH
t
AS
t
AH
t
BS
t
BH
t
WS
t
WH
t
CDP
t
LZCP
t
CDF
t
LZCF
t
OHF
t
HZCF
t
HZOE
t
DS
t
DH
t
DH
t
DS
A3
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
D8
Q9
D3
D6
D11
Q4
Q7
Q9
Read
(A1)
Read
(A2)
Write
[8]
Write
(A3)
(A5)
Read
(A4)
Read
Read
(A7)
Write
[9]
(A8)
Read
(A9)
Dsel
Write
[9]
(A11)
Write
(A6)
t
HZCP
t
HZOE
Don’t care
Undefined
OE
[6]
[Flow-through Mode]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS9C25512M2018L-200BC | TERM. F/O CABLE SC-SC/ DPLX/RISER/2M/BLUE |
| AS9C25256M2018L-200BC | TERM. F/O CABLE SC-SC/ DPLX/RISER/3M/BLUE |
| AS9C25512M2018L-200BI | TERM. F/O CABLE SC-SC/ DPLX/RISER/5M/BLUE |
| AS9C25256M2018L-200BI | TERM. F/O CABLE SC-SC/ DPLX/RISER/10M/BLUE |
| AS9C25512M2018L-200FC | TERM. F/O CABLE SC-SC/ DPLX/RISER/2M/RED |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS9C25256M2018L-200BC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2018L-200BI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2018L-200FC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2018L-200FI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
| AS9C25256M2018L-200TC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:2.5V 512/256K x 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface |
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