- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄381348 > AS7C3364PFS36B-200TQCN (ALLIANCE SEMICONDUCTOR CORP) 3.3V 64K X 32/36 pipeline burst synchronous SRAM PDF資料下載
參數(shù)資料
| 型號： | AS7C3364PFS36B-200TQCN |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| 中文描述： | 64K X 36 STANDARD SRAM, 3 ns, PQFP100 |
| 封裝： | 14 X 20 MM, LEAD FREE, TQFP-100 |
| 文件頁數(shù)： | 10/19頁 |
| 文件大?。?/td> | 548K |
| 代理商： | AS7C3364PFS36B-200TQCN |
AS7C3364PFS32B
AS7C3364PFS36B
12/10/04; v.1.4
Alliance Semiconductor
P. 10 of 19
Snooze Mode Electrical Characteristics
Timing characteristics over operating range
Parameter
Sym
f
Max
t
CYC
t
CD
t
OE
t
LZC
t
OH
t
LZOE
t
HZOE
t
HZC
t
OHOE
t
CH
t
CL
t
AS
t
DS
t
WS
t
CSS
t
AH
t
DH
t
WH
t
CSH
t
ADVS
t
ADSPS
t
ADSCS
t
ADVH
t
ADSPH
t
ADSCH
–200
–166
–133
Unit
MHz
Notes
1
1
See “Notes” on page 16.
Min
Max
Min
–
Max
166
Min
–
Max
133
Clock frequency
–
200
Cycle time
5
–
6
–
7.5
–
ns
Clock access time
Output enable LOW to data valid
–
3.0
–
–
3.5
3.5
–
–
4.0
4.0
ns
ns
–
3.0
Clock HIGH to output Low Z
0
–
0
–
0
–
ns
2,3,4
Data output invalid from clock HIGH
1.5
–
1.5
–
1.5
–
ns
2
Output enable LOW to output Low Z
Output enable HIGH to output High Z
0
–
0
–
–
0
–
–
ns
ns
2,3,4
2,3,4
–
3.0
3.5
4.0
Clock HIGH to output High Z
–
3.0
–
3.5
–
4.0
ns
2,3,4
Output enable HIGH to invalid output
Clock HIGH pulse width
0
–
0
–
–
0
–
–
ns
ns
2.0
–
2.4
2.5
5
Clock LOW pulse width
2.3
–
2.4
–
2.5
–
ns
5
Address setup to clock HIGH
Data setup to clock HIGH
1.4
–
1.5
1.5
–
–
1.5
1.5
–
–
ns
ns
6
6
1.4
–
Write setup to clock HIGH
1.4
–
1.5
–
1.5
–
ns
6,7
Chip select setup to clock HIGH
Address hold from clock HIGH
1.4
–
1.5
0.5
–
–
1.5
0.5
–
–
ns
ns
6,8
6
0.4
–
Data hold from clock HIGH
0.4
–
0.5
–
0.5
–
ns
6
Write hold from clock HIGH
Chip select hold from clock HIGH
0.4
–
0.5
0.5
–
–
0.5
0.5
–
–
ns
ns
6,7
6,8
0.4
–
ADV setup to clock HIGH
1.4
–
1.5
–
1.5
–
ns
6
ADSP setup to clock HIGH
ADSC setup to clock HIGH
1.4
–
1.5
1.5
–
–
1.5
1.5
–
–
ns
ns
6
6
1.4
–
ADV hold from clock HIGH
0.4
–
0.5
–
0.5
–
ns
6
ADSP hold from clock HIGH
ADSC hold from clock HIGH
0.4
–
0.5
0.5
–
–
0.5
0.5
–
–
ns
ns
6
6
0.4
–
Description
Conditions
ZZ > V
IH
Symbol
I
SB2
t
PDS
t
PUS
t
ZZI
t
RZZI
Min
Max
30
Units
mA
cycle
cycle
cycle
Current during Snooze Mode
ZZ active to input ignored
ZZ inactive to input sampled
ZZ active to SNOOZE current
ZZ inactive to exit SNOOZE current
2
2
2
0
相關PDF資料 |
PDF描述 |
|---|---|
| AS7C3364PFS36B-200TQI | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFS36B-200TQIN | 3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C34096A-10TC | 3.3V 512K x 8 CMOS SRAM |
| AS7C34096A-10TCN | 3.3V 512K x 8 CMOS SRAM |
| AS7C34096A-10TI | 3.3V 512K x 8 CMOS SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C3364PFS36B-200TQI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C3364PFS36B-200TQIN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 64K X 32/36 pipeline burst synchronous SRAM |
| AS7C34096A-10JCN | 功能描述:靜態(tài)隨機存取存儲器 4M, 3.3V, 10ns, FAST 512K x 8 Asynch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C34096A-10JCNTR | 功能描述:靜態(tài)隨機存取存儲器 4M, 3.3V, 10ns, FAST 512K x 8 Asynch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| AS7C34096A-10JIN | 功能描述:靜態(tài)隨機存取存儲器 4M, 3.3V, 10ns, FAST 512K x 8 Asynch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復。