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參數(shù)資料
| 型號(hào)： | AS7C33512PFD36A-166TQIN |
| 廠(chǎng)商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 3.3V 512K x 32/36 pipelined burst synchronous SRAM |
| 中文描述： | 512K X 36 STANDARD SRAM, 3.4 ns, PQFP100 |
| 封裝： | 14 X 20 MM, LEAD FREE, TQFP-100 |
| 文件頁(yè)數(shù)： | 16/19頁(yè) |
| 文件大小： | 541K |
| 代理商： | AS7C33512PFD36A-166TQIN |
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AS7C33512PFD32A
AS7C33512PFD36A
2/10/05, v 1.3
Alliance Semiconductor
16 of 19
AC test conditions
Output load: For t
LZC
, t
LZOE
, t
HZOE
, t
HZC
, see Figure C. For all others, see Figure B.
Notes
1
2
3
4
5
6
For test conditions, see “AC test conditions”, Figures A, B, and C.
This parameter is measured with output load condition in Figure C.
This parameter is sampled but not 100% tested.
t
HZOE
is less than t
LZOE
, and t
HZC
is less than t
LZC
at any given temperature and voltage.
t
CH
is measured as high if above VIH, and t
CL
is measured as low if below VIL.
This is a synchronous device. All addresses must meet the specified setup and hold times for all rising edges of CLK. All other synchronous inputs must
meet the setup and hold times for all rising edges of CLK when chip is enabled.
Write refers to
GWE
,
BWE
, and
BW[a:d].
Chip select refers to
CE0
,
CE1
, and
CE2
.
7
8
Z
0
= 50
D
OUT
50
Figure B: Output load (A)
30 pF*
Figure A: Input waveform
10%
90%
GND
90%
10%
+3.0V
Input pulse level: GND to 3V. See Figure A.
Input rise and fall time (measured at 0.3V and 2.7V): 2 ns. See Figure A.
Input and output timing reference levels: 1.5V.
V
L
= 1.5V
for 3.3V I/O;
= V
DDQ
/2
for 2.5V I/O
Thevenin equivalent:
353
/1538
5 pF*
319
/1667
D
OUT
GND
Figure C: Output load(B)
*including scope
and jig capacitance
+3.3V for 3.3V I/O;
/+2.5V for 2.5V I/O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C33512PFS16A | 3.3V 512K×16 Pipeline Burst Synchronous SRAM(3.3V 512K×16流水線(xiàn)脈沖同步靜態(tài)RAM) |
| AS7C33512PFS18A | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQC | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQCN | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQI | 3.3V 512K x 18 pipeline burst synchronous SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C33512PFS16A | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:3.3V 512K x 16/18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQC | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQCN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFS18A-133TQI | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
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