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參數(shù)資料
| 型號： | AS7C33512PFD18A-133TQCN |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| 中文描述： | 512K X 18 STANDARD SRAM, 4.5 ns, PQFP100 |
| 封裝： | 14 X 20 MM, LEAD FREE, TQFP-100 |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 515K |
| 代理商： | AS7C33512PFD18A-133TQCN |
November 2004
Copyright Alliance Semiconductor. All rights reserved.
AS7C33512PFD18A
3.3V 512K
×
18 pipeline burst synchronous SRAM
12/1/04;
v.1.3
Alliance Semiconductor
1 of 20
Features
Organization: 524,288 words × 18 bits
Fast clock speeds to 166 MHz
Fast clock to data access: 3.5/4.0 ns
Fast OE access time: 3.5/4.0 ns
Fully synchronous register-to-register operation
Dual-cycle deselect
Asynchronous output enable control
Individual byte write and global write
Available in 100-pin TQFP package
Linear or interleaved burst control
Snooze mode for reduced power-standby
Common data inputs and data outputs
Byte write enables
Multiple chip enables for easy expansion
3.3V core power supply
2.5V or 3.3V I/O operation with separate V
DDQ
Selection guide
–166
–133
Units
Minimum cycle time
6
7.5
ns
Maximum clock frequency
Maximum clock access time
166
3.5
133
4
MHz
ns
Maximum operating current
475
425
mA
Maximum standby current
Maximum CMOS standby current (DC)
130
30
100
30
mA
mA
Logic block diagram
Burst logic
CLK
ADSC
ADSP
LBO
CLK
CS
CLR
19
17
19
A[18:0]
19
Address
register
D
CS
Q
CLK
512K × 18
Memory
array
18
18
DQb
CLK
D
registers
D
Q
registers
DQa
CLK
Q
Enable
register
CE
D
Q
Enable
rdelay
CLK
D
Q
Output
registers
CLK
Input
registers
Power
down
2
CE0
CE2
BW
b
BW
a
OE
ZZ
OE
CLK
BWE
GWE
18
DQ[a,b]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C33512PFD18A-133TQI | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD18A-133TQIN | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD18A-166TQC | 3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD32A | 3.3V 512K x 32/36 pipelined burst synchronous SRAM |
| AS7C33512PFD32A-133TQC | 3.3V 512K x 32/36 pipelined burst synchronous SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C33512PFD18A-133TQI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD18A-133TQIN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD18A-166TQC | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD18A-166TQCN | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
| AS7C33512PFD18A-166TQI | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 pipeline burst synchronous SRAM |
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