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參數(shù)資料
| 型號(hào)： | AS7C33512NTD18A-166TQC |
| 廠商： | ALLIANCE SEMICONDUCTOR CORP |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| 中文描述： | 512K X 18 ZBT SRAM, 4 ns, PQFP100 |
| 封裝： | 14 X 20 MM, TQFP-100 |
| 文件頁(yè)數(shù)： | 1/19頁(yè) |
| 文件大小： | 439K |
| 代理商： | AS7C33512NTD18A-166TQC |
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November 2004
Copyright Alliance Semiconductor. All rights reserved.
AS7C33512NTD18A
3.3V 512K
×
18 Pipelined burst Synchronous SRAM with NTD
TM
11/30/04
;
v.2.1
Alliance Semiconductor
1 of 19
Features
Organization: 524,288 words × 18 bits
NTD
architecture for efficient bus operation
Fast clock speeds to 166 MHz
Fast clock to data access: 3.5/4.0 ns
Fast OE access time: 3.5/4.0 ns
Fully synchronous operation
Common data inputs and data outputs
Asynchronous output enable control
Available in100-pin TQFP
Byte write enables
Clock enable for operation hold
Multiple chip enables for easy expansion
3.3V core power supply
2.5V or 3.3V I/O operation with separate V
DDQ
Self-timed WRITE cycles
“Interleaved” or “Linear burst” modes
Snooze mode for standby operation
Selection Guide
-166
–133
Units
Minimum cycle time
Maximum clock frequency
6
7.5
133
ns
166
MHz
Maximum clock access time
3.5
4
ns
Maximum operating current
Maximum standby current
475
130
400
100
mA
mA
Maximum CMOS standby current (DC)
30
30
mA
W
Address
register
Burst logic
D
Q
CLK
Output
Register
DQ[a:b]
18
18
19
19
CLK
CEN
CE0
CE1
CE2
A[18:0]
OE
CLK
Control
logic
CLK
Data
Input
Register
D
Q
CLK
18
18
OE
512K x 18
SRAM
Array
R/W
BWa
BWb
DQ [a:b]
CLK
Q
D
ADV/LD
LBO
addr. registers
Write delay
18
19
Logic block diagram
ZZ
18
CLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS7C33512NTD18A-166TQCN | 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| AS7C33512NTD18A-166TQI | 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| AS7C33512NTD18A-166TQIN | 3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| AS7C33512NTD32A | 3.3V 512K x 32/36 Pipelined SRAM with NTD |
| AS7C33512NTD32A-133TQC | 3.3V 512K x 32/36 Pipelined SRAM with NTD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS7C33512NTD18A-166TQCN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| AS7C33512NTD18A-166TQI | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| AS7C33512NTD18A-166TQIN | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 18 Pipelined burst Synchronous SRAM with NTD |
| AS7C33512NTD32A | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 32/36 Pipelined SRAM with NTD |
| AS7C33512NTD32A-133TQC | 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 512K x 32/36 Pipelined SRAM with NTD |
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