參數(shù)資料
型號: AS7C1024B-15TJIN
廠商: ALLIANCE SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 5V 128K X 8 CMOS SRAM
中文描述: 128K X 8 STANDARD SRAM, 15 ns, PDSO32
封裝: 0.300 INCH, PLASTIC, SOJ-32
文件頁數(shù): 2/9頁
文件大?。?/td> 111K
代理商: AS7C1024B-15TJIN
AS7C1024B
3/26/04, v 1.2
Alliance Semiconductor
P. 2 of 9
Functional description
The AS7C1024B is a high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) device organized as 131,072 words x 8
bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t
AA
, t
RC
, t
WC
) of 10/12/15/20 ns with output enable access times (t
OE
) of 5/6/7/8 ns are ideal for high
performance applications. Active high and low chip enables (CE1, CE2) permit easy memory expansion with multiple-bank systems.
When CE1 is high or CE2 is low, the devices enter standby mode. If inputs are still toggling, the device will consume I
SB
power. If the bus is
static, then full standby power is reached (I
SB1
). For example, the AS7C1024B is guaranteed not to exceed 55 mW under nominal full standby
conditions.
A write cycle is accomplished by asserting write enable (WE) and both chip enables (CE1, CE2). Data on the input pins I/O0 through I/O7 is
written on the rising edge of WE (write cycle 1) or the active-to-inactive edge of CE1 or CE2 (write cycle 2). To avoid bus contention, external
devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and both chip enables (CE1, CE2), with write enable (WE) high. The chips drive I/
O pins with the data word referenced by the input address. When either chip enable is inactive, output enable is inactive, or write enable is active,
output drivers stay in high-impedance mode.
Note: Stresses greater than those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
Key: X = don’t care, L = low, H = high
Absolute maximum ratings
Parameter
Symbol
V
t1
V
t2
P
D
T
stg
T
bias
I
OUT
Min
–0.50
–0.50
–65
–55
Max
+7.0
Unit
V
V
W
°
C
°
C
mA
Voltage on V
CC
relative to GND
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
CC
applied
DC current into outputs (low)
V
CC
+0.50
1.0
+150
+125
20
Truth table
CE1
H
X
L
L
L
CE2
X
L
H
H
H
WE
X
X
H
H
L
OE
X
X
H
L
X
Data
High Z
High Z
High Z
D
OUT
D
IN
Mode
Standby (I
SB
, I
SB1
)
Standby (I
SB
, I
SB1
)
Output disable (I
CC
)
Read (I
CC
)
Write (
ICC
)
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相關代理商/技術參數(shù)
參數(shù)描述
AS7C1024B-15TJINTR 功能描述:IC SRAM 1MBIT 15NS 32SOJ 制造商:alliance memory, inc. 系列:- 零件狀態(tài):在售 存儲器類型:易失 存儲器格式:SRAM 技術:SRAM - 異步 存儲容量:1Mb (128K x 8) 寫周期時間 - 字,頁:15ns 訪問時間:15ns 存儲器接口:并聯(lián) 電壓 - 電源:4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C(TA) 標準包裝:1,000
AS7C1024B-20JC 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM
AS7C1024B-20JCN 功能描述:靜態(tài)隨機存取存儲器 1M, 5V, 20ns FAST 128K x 8 Asynch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
AS7C1024B-20JCNTR 功能描述:靜態(tài)隨機存取存儲器 1M, 5V, 20ns FAST 128K x 8 Asynch 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
AS7C1024B-20JI 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:5V 128K X 8 CMOS SRAM