參數(shù)資料
型號: AS5140H-ASST
廠商: ams
文件頁數(shù): 25/38頁
文件大?。?/td> 1279K
描述: IC ENCODER ROTARY 10BIT 16-SSOP
標準包裝: 2,000
傳感范圍: 45mT ~ 75mT
類型: 線性,旋轉編碼器 - 可編程
電源電壓: 3 V ~ 3.6 V,4.5 V ~ 5.5 V
電流 - 電源: 21mA
電流 - 輸出(最大): 4mA
輸出類型: 數(shù)字式,PWM,10 位串行
特點: 可編程
工作溫度: -40°C ~ 150°C
封裝/外殼: *
供應商設備封裝: *
包裝: *
www.austriamicrosystems.com/AS5140H
Revision 1.4
24 - 37
AS5140H
Data Sheet - Detailed Description
Figure 17. Connections for 5V / 3.3V Supply Voltages
7.9 Choosing the Proper Magnet
Typically the magnet should be 6mm in diameter and e2.5mm in height. Magnetic materials such as rare earth AlNiCo, SmCo5 or NdFeB are
recommended. The magnets field strength perpendicular to the die surface should be verified using a gaussmeter. The magnetic field B
v
 at a
given distance, along a concentric circle with a radius of 1.1mm (R1), should be in the range of ?5mT&?5mT. (see Figure 18).
7.9.1   Physical Placement of the Magnet
The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the IC package as shown in Figure 19.
Magnet Placement. The magnets center axis should be aligned within a displacement radius R
d
 of 0.25mm from the defined center of the IC
with reference to the edge of pin #1 (see Figure 19). This radius includes the placement tolerance of the chip within the SSOP-16 package (+/-
0.235mm). The displacement radius R
d
 is 0.485mm with reference to the center of the chip (see Alignment Mode on page 22).
The vertical distance should be chosen such that the magnetic field on the die surface is within the specified limits (see Figure 18). The typical
distance z between the magnet and the package surface is 0.5mm to 1.8mm with the recommended magnet (6mm x 2.5mm). Larger gaps are
possible, as long as the required magnetic field strength stays within the defined limits. A magnetic field outside the specified range may still
produce usable results, but the out-of-range condition will be indicated by MagINCn (pin 1) and MagDECn (pin 2), (see Table 16).
Internal
VDD
LDO
I
N
T
E
R
F
A
C
E
VSS
VDD5V
VDD3V3
100n
4.5 - 5.5V
+
2,2... 10礔
DO
PWM_LSB
CLK
CSn
A_LSB_U
B_Dir_V
Index_W
Prog
Internal
VDD
LDO
I
N
T
E
R
F
A
C
E
VSS
VDD5V
VDD3V3
3.0 - 3.6V
+
DO
PWM_LSB
CLK
CSn
A_LSB_U
B_Dir_V
Index_W
Prog
100n
5V Operation
3.3V Operation
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