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| 型號(hào)： | AS3932-BTST |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 微波射頻器件 |
| 英文描述： | Programmable 3D LF Receiver; Package Type: TSSOP-16; Temperature Range: -40 - +85 °C; Supply Voltage: 2,40-3,60 |
| 封裝： | TSSOP-16 |
| 文件頁(yè)數(shù)： | 21/34頁(yè) |
| 文件大?。?/td> | 455K |
| 代理商： | AS3932-BTST |
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AS3932
Datasheet - Detailed Description
8.3.2 Antenna Damper
The antenna damper allows the chip to deal with higher field strength, it is enabled by register
R1<4>
. It consists of shunt resistors which
degrade the quality factor of the resonator by reducing the signal at the input of the amplifier. In this way the resonator sees a smaller parallel
resistance (in the band of interest) which degrades its quality factor in order to increase the linear range of the channel amplifier (the amplifier
doesn't saturate in presence of bigger signals).
Table 16
shows the bit setup.
8.4 Channel Selector / Demodulator / Data Slicer
When at least one of three gain channel enters initial wake-up state the channel selector makes a decision which gain channel to connect to the
envelope detector. If only one channel is in wake-up state the selection is obvious. If more than one channel enters wake-up state in 256μs
following the first active channel the channel with highest RSSI value is selected. The output signal (amplified LF carrier) of selected channel is
connected to the input of the demodulator.
The performance of the demodulator can be optimized according to bit rate and preamble length as described in
Table 17
and
Table 18
.
If the bit rate gets higher the time constant in the envelop detector must be set to a smaller value. This means that higher noise is injected
because of the wider band. The next table is a rough indication of how the envelop detector looks like for different bit rates. By using proper data
slicer settings it is possible to improve the noise immunity paying the penalty of a longer preamble. In fact if the data slicer has a bigger time
constant it is possible to reject more noise, but every time a transmission occurs, the data slicer need time to settle. This settling time will
influence the length of the preamble.
Table 18
gives a correlation between data slicer setup and minimum required preamble length.
Table 16. Antenna Damper Bit Setup
R4<5>
R4<4>
Shunt resistor (parallel to the resonator at 125 kHz)
0
0
1 k
Ω
3 k
Ω
9 k
Ω
27 k
Ω
0
1
1
0
1
1
Table 17. Bit Setup for the Envelop Detector for Different Symbol Rates
R3<2>
R3<1>
R3<0>
Symbol rate [Manchester symbols/s]
0
0
0
4096
0
0
1
2184
0
1
0
1490
0
1
1
1130
1
0
0
910
1
0
1
762
1
1
0
655
1
1
1
512
Table 18. Bit Setup for the Data Slicer for Different Preamble Length
R3<5>
R3<4>
R3<3>
Mnimum preamble length [ms]
0
0
0
0.8
0
0
1
1.15
0
1
0
1.55
0
1
1
1.9
1
0
0
2.3
1
0
1
2.65
1
1
0
3
1
1
1
3.5
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS3932-BQFT | Programmable 3D LF Receiver; Package Type: QFN(4x4)-16; Temperature Range: -40 - +85 °C; Supply Voltage: 2,40-3,60 |
| AS4C1M16E5 | 5V 1M×16 CMOS DRAM (EDO)(5V 1M×16 CMOS動(dòng)態(tài)RAM（擴(kuò)展數(shù)據(jù)總線）) |
| AS4C1M16F5 | 5V 1M×16 CMOS DRAM (Fast-page Mode)(5V 1M×16 CMOS動(dòng)態(tài)RAM（快速頁(yè)面模式）) |
| AS4C256K16E0-50TC | 5V 256Kx16 CMOS DRAM (EDO) |
| AS4C256K16E0-30 | 5V 256Kx16 CMOS DRAM (EDO) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AS3932-DB | 制造商:ams 功能描述:AS3932 Demo Board Rx & Tx |
| AS3932-DK | 制造商:ams 功能描述:AS3932 Development System |
| AS3933 DB | 制造商:AMS 功能描述:BOARD DEMO FOR AS3933 |
| AS3933 DEV SYSTEM | 功能描述:BOARD DEMO FOR AS3933 制造商:ams 系列:- 零件狀態(tài):有效 類型:接收器，ASK 頻率:125kHz 配套使用產(chǎn)品/相關(guān)產(chǎn)品:AS3933 所含物品:2 板，電源，軟件 標(biāo)準(zhǔn)包裝:1 |
| AS3933BQFT | 制造商:ams 功能描述:T&R / QFN 16 (4x4) |
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