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參數(shù)資料
| 型號(hào)： | AS3588AQ |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 元件分類： | 路由/交換 |
| 英文描述： | AB 7C 7#8 PIN RECP |
| 中文描述： | TELECOM, DIGITAL TIME SWITCH, PQFP44 |
| 封裝： | QFP-44 |
| 文件頁(yè)數(shù)： | 14/15頁(yè) |
| 文件大?。?/td> | 98K |
| 代理商： | AS3588AQ |
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Data Sheet
AS3588A
Rev. 3.1
Page 14 of 15
July 1999
Read Timing Characteristics (Continued):
Operation over recommended temperature and voltage range
Symbol
tSCDRD
Parameter
C/D Setup Time to Read
Pulse Start
C/D Hold Time from Read
PulseEnd
Address Select Setup Time
to Read Pulse Start
Address Select Hold Time
from Read Pulse End
Condition
Min.
Typ.*
Max.
Units
20
ns
tHCDRD
25
ns
tSASRD
20
ns
tHASRD
25
ns
tPDD
Data Delay Time
CL = 200pF
120
ns
tHZ
Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing
Note
: Because of internal clock re-synchronization, one single additional requirement is recommended in order to produce a
simultaneous instruction flow in a multi-chip configuration: The RD rising edge has to be 20 to 20 + tWL(CK) ns late relative to
clock falling edge.
Delay Time to High Z
80
ns
CS1, CS2
C/D
WR
RD
A1=S1
A2=S2
DOUT
tWLRD
tWHRD
tFRD
tRRD
tREPRD
tSHRD
tHHRD
tSLCSRD
tHLCSRD
tSHCSRD
tHHCSRD
tSCDRD
tHCDRD
tHZ
tSASRD
tHASRD
tPDD
Figure 7 Read Timing
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