參數(shù)資料
型號(hào): AS2702-16
廠商: AUSTRIAMICROSYSTEMS AG
元件分類: 其它接口
英文描述: Actuator sensor interface; Package Type: SOIC-300-16
中文描述: SPECIALTY INTERFACE CIRCUIT, PDSO16
封裝: SOIC-300-16
文件頁(yè)數(shù): 7/13頁(yè)
文件大?。?/td> 134K
代理商: AS2702-16
AS2702 – AS-Interface Slave IC
Revision 1.3, 21-Aug-08
Page 7 of 13
Notes:
1
2
3
Pulse width depends substantially on value of external pull-up resistor
Applies only to data port pins set to 'output/input' operation
Timing reference is DSTBn HL-edge.
Applies only to data port pins set to either 'output/input' or 'input' operation
The dc-parameters of the data port pins D3, …, D0 are specified as follows:
Symbol
Parameter
IOUTLO
Sink current @ output L
IOUTHI
Leakage current @ output off
VSCHLT
Input threshold voltage
VIN
Acceptable input voltage @ output off
Min
10
-1
2.5
-0.3
Max
1
3.5
40
Unit
mA
μA
V
V
Note
VOUT = 1V
1
2
Notes:
1
2
To govern the data transfer at data port D3, …,D0 strobe pin DSTBn is equipped with a low-side open-drain output switch plus a
passive high-side current source with a nom. 10μA pull-up current capability.
However a second function is assigned to the DSTBn pin which requires it to be input as well: if a low-pulse is imposed on DSTBn
by external means with a pulse width of at least 50 to 100ms, the slave device will be put in RESET condition, as described in
section “Reset”.
The dc-and timing parameters of strobe pin DSTBn are specified as follows:
Symbol
Parameter
IOUTLO
Sink current @ output L
IOUTHI
Leakage current @ output off
IINLO
Input current @ VIN = 1V
VSCHLT
Input threshold voltage
VIN
Acceptable input voltage @ output off
tNORESET
DSTBn L-phase width, not triggering RESET
tRESET
DSTBn L-phase width, triggering RESET
CPINEXT
Max. stray capacity
Output stage is low-side open-drain; ext. pull-up resistor required as no pull-up structure on chip
No hysteresis implemented
Min
10
-10
-5
1.5
-0.3
100
Max
10
-20
3.5
40
50
20
Unit
mA
μA
μA
V
V
ms
ms
pF
Note
VOUT = 1V
VOUT = 5V
1
2
Notes:
1
DSTBn is equipped with an on-chip pull-up current source, which ensures a sufficiently fast LH-edge upon output switch-off in
open-pin condition, to prevent erroneous RESET triggering. If DSTBn has an external load connected to it, an additional
external pull-up resistor may be needed to prevent erroneous RESET triggering upon output switch-off.
No hysteresis implemented
2
Parameter Port Pins P3, …, P0 and Parameter Strobe Pin PSTBn
(Note that parameter port pins P3, …, P0 are only available on AS2702 package option SOIC 20, not on the SOIC 16 option.)
The transfer of data at P3, …, P0 and the supporting strobe action at pin PSTBn takes place similarly as at D3, …, D0 resp. DSTBn.
Each parameter port pin P3, …, P0 is equipped with both a low-side open-drain output switch plus a passive, but switchable high-
side current source with a nom. 10 μA pull-up current capability, and with an input stage.
Though equipped for bidirectional data transfer as D3, …, D0, the parameter port is nevertheless less flexible than the data port.
Basically the parameter port is set to behave portwise as
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