參數(shù)資料
型號(hào)： AS1523-T
廠商： AUSTRIAMICROSYSTEMS AG
元件分類： ADC
英文描述： 10-Bit, 4-Ch, 300ksps, ADC; Package Type: TSSOP-16
封裝： TSSOP-16
文件頁(yè)數(shù)： 21/28頁(yè)
文件大?。?/td> 893K
代理商： AS1523-T
www.austriamicrosystems.com
Revision 1.00
21 - 28
AS1522/AS1523
Data Sheet
- Detailed Description
A 0.01μF bypass capacitor plus the internal 17k
Ω
reference resistor at REFADJ form an R/C filter with a 170μs time
constant. To achieve full 10-bit accuracy, 7 time constants (1.4ms) are required after power-up if the bypass capacitor
is fully discharged between conversions. Waiting this 1.4ms in reduced-power mode instead of normal operation mode
can further reduce power consumption. This is achieved by using the sequence shown in
Figure 30 on page 21
.
Figure 31 on page 21
shows the AS1523 power consumption for conversions using full power-down mode (PD1 = PD0
= 0
(see Table 12)
, an external reference, and the maximum clock speed. One dummy conversion to power-up the
device is required, but no wait-time is necessary to start the second conversion, thereby achieving lower power con-
sumption up to the full sampling rate.
Figure 30. Full Power-Down Timing Waveforms (AS1523)
Figure 31. Average Supply Current vs. Sampling Rate (AS1523, FULLPD, and External Reference)
Reference
The AS1522/AS1523 can operate with the internal or an external reference.
Internal Reference
The internal reference is selected by placing a capacitor between REFADJ and GND. The internally trimmed 1.22V
bandgap voltage available at REFADJ is buffered with a gain of 2.045V/V to pin REF, where 2.5V are available. A
decoupling capacitor is needed at pin REF.
DIN
1
0
1
1
1
0
0
0
0
Full Power-
Down
Reduced-
Power
REF
1
REFADJ
I
VDD1
+I
VDD2
+I
VDD3
Full Power-
Down
1.22V
2.5V
2.2mA
2.2mA
2.2mA
2.5V
1.22V
0mA
0mA
0.4mA
γ
= R/C = 17
Ω
k x 0.01μF
Full Power-
Down
Normal Mode
Conversion
Normal Mode
Dummy
Conversion
Reduced
Power Mode
Normal Mode
Conversion
Full Power-
Down
1 Channel
0.1
100
100000
0.001
0.01
0.1
1
10
100
Sampling Rate (ksps)
S
.
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