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參數(shù)資料
| 型號： | AOT400L |
| 廠商： | ALPHA |
| 英文描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 中文描述： | N溝道增強型場效應管 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 75K |
| 代理商： | AOT400L |
AOT400
Symbol
STATIC PARAMETERS
Min
Typ
Max
Units
BV
DSS
75
V
1
5
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
100
4
nA
V
A
2
2.8
200
4.2
7.2
4.6
106
200
0.7
4.7
8.2
5.2
T
J
=125°C
m
V
SD
I
S
DYNAMIC PARAMETERS
1
V
A
110
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
8390
1060
450
1.2
10500
pF
pF
pF
1.5
Q
g
(10V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
167
40
45
29
41
90
34
64
180
210
nC
nC
nC
ns
ns
ns
ns
80
ns
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=30A, dI/dt=100A/
μ
s
Drain-Source Breakdown Voltage
On state drain current
I
D
=10mA, V
GS
=0V
V
DS
=75V, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=30A
Reverse Transfer Capacitance
Gate resistance
I
F
=30A, dI/dt=100A/
μ
s
V
GS
=0V, V
DS
=25V, f=1MHz
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
I
DSS
μ
A
Gate Threshold Voltage
V
DS
=V
GS
,
I
D
=250
μ
A
V
DS
=0V, V
GS
=±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
R
DS(ON)
Static Drain-Source On-Resistance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
g
FS
Forward Transconductance
m
V
GS
=6V, I
D
=30A
V
DS
=5V, I
D
=30A
V
DS
=15V, I
D
=70A
I
S
=1A, V
GS
=0V
S
V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
V
GS
=10V, V
DS
=30V, I
D
=30A
Input Capacitance
Output Capacitance
V
GS
=10V, V
DS
=30V, R
L
=1
,
R
GEN
=3
A: The value of R
θ
JA
is measured with the device in a still air environment with T
A
=25°C.
B. The power dissipation P
D
is based on T
J(MAX)
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175°C.
D. The R
θ
JA
is the sum of the thermal impedence from junction to case R
θ
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
μ
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of T
J(MAX)
=175°C.
G. The maximum current rating is limited by bond-wires.
Rev3: August 2005
Alpha & Omega Semiconductor, Ltd.
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