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參數(shù)資料
| 型號： | AOL1434L |
| 廠商： | ALPHA |
| 英文描述： | N-Channel Enhancement Mode Field Effect Transistor |
| 中文描述： | N溝道增強型場效應管 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大?。?/td> | 135K |
| 代理商： | AOL1434L |
AOL1434
Symbol
STATIC PARAMETERS
Min
Typ
Max
Units
BV
DSS
25
V
1
5
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
0.1
2.5
μ
A
0.8
150
1.4
V
A
5.2
7.8
7.8
49
0.74
6.3
9.4
10
T
J
=125°C
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
S
V
A
1.0
50
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge
2050
485
280
0.86
2460
pF
pF
pF
1.5
Q
g
(10V)
Q
g
(4.5V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
34
17
5
3.5
7.5
11
27
8
30
19
41
22
nC
nC
nC
nC
ns
ns
ns
ns
36
ns
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=20A, dI/dt=100A/
μ
s
Drain-Source Breakdown Voltage
On state drain current
I
D
=250
μ
A, V
GS
=0V
V
DS
=20V, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=30A
Reverse Transfer Capacitance
Gate resistance
I
F
=20A, dI/dt=100A/
μ
s
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
I
DSS
μ
A
Gate Threshold Voltage
V
DS
=V
GS
I
D
=250
μ
A
V
DS
=0V, V
GS
= ±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
m
V
GS
=4.5V, I
D
=20A
V
DS
=5V, I
D
=20A
I
S
=1A,V
GS
=0V
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=10V, V
DS
=12.5V,
R
L
=0.68
, R
GEN
=3
Turn-On DelayTime
Gate Drain Charge
V
GS
=0V, V
DS
=12.5V, f=1MHz
Total Gate Charge
Gate Source Charge
V
GS
=0V, V
DS
=0V, f=1MHz
V
GS
=10V, V
DS
=12.5V, I
D
=20A
A: The value of R
θ
JA
is measured with the device in a still air environment with T
A
=25°C.
B. The power dissipation P
D
is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C.
D. The R
θ
JA
is the sum of the thermal impedence from junction to case R
θ
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 ms pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assumin
a maximum junction temperature of TJ(MAX)=175°C.
G. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The
SOA curve provides a single pulse rating.
H. Surface mounted on a 1 in 2 FR-4 board with 2oz. Copper.
Rev0: Mar 2006
Alpha & Omega Semiconductor, Ltd.
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