參數(shù)資料
型號: AOL1401L
廠商: ALPHA
元件分類: MOSFETs
英文描述: P-Channel Enhancement Mode Field Effect Transistor
中文描述: 的P -溝道增強型場效應(yīng)晶體管
文件頁數(shù): 2/5頁
文件大?。?/td> 124K
代理商: AOL1401L
AOL1401
Symbol
STATIC PARAMETERS
Min
Typ
Max
Units
BV
DSS
-38
V
-100
-500
±1
±10
-3.5
T
J
=55°C
μ
A
μ
A
V
A
V
GS(th)
I
D(ON)
-1.5
-120
-2.2
6.8
9.1
7.9
50
0.71
8.5
11
10
T
J
=125°C
m
S
V
A
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
-1
14.5
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge (10V)
3800
560
350
7.5
4560
pF
pF
pF
9
Q
g
(10V)
Q
g
(4.5V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
61.2
30.8
11.88
15.4
13.5
17
97
43
30
29
74
37
nC
nC
nC
nC
ns
ns
ns
ns
ns
nC
36
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Gate-Body leakage current
V
DS
=0V, V
GS
=±25V
V
DS
=V
GS
I
D
=-250
μ
A
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
I
F
=-20A, dI/dt=100A/
μ
s
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250
μ
A, V
GS
=0V
V
DS
=-30V, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-20V, I
D
=-20A
Reverse Transfer Capacitance
Gate resistance
I
F
=-20A, dI/dt=100A/
μ
s
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
I
DSS
nA
Gate Threshold Voltage
V
DS
=0V, V
GS
=±20V
Zero Gate Voltage Drain Current
I
GSS
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
m
V
GS
=-10V, I
D
=-20A
V
DS
=-5V, I
D
=-20A
I
S
=-1A,V
GS
=0V
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=-10V, V
DS
=-20V, R
L
=1
,
R
GEN
=3
V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge (4.5V)
Gate Source Charge
Gate Drain Charge
Input Capacitance
Output Capacitance
Turn-On DelayTime
V
GS
=0V, V
DS
=-20V, f=1MHz
V
GS
=-10V, V
DS
=-20V, I
D
=-20A
A: The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The Power
dissipation P
DSM
is based on R
θ
JA
and the maximum allowed junction temperature of 150°C. The value in any given application depends on the
user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.
B. The power dissipation P
D
is based on T
J(MAX)
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175°C.
D. The R
θ
JA
is the sum of the thermal impedence from junction to case R
θ
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
μ
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of T
J(MAX)
=175°C.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T
Rev 0: September 2005
A
=25°C.
Alpha & Omega Semiconductor, Ltd.
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