參數(shù)資料
型號： AO4817
廠商： ALPHA
英文描述： Dual P-Channel Enhancement Mode Field Effect Transistor
中文描述： 雙P溝道增強型場效應晶體管
文件頁數(shù)： 2/4頁
文件大?。?/td> 110K
代理商： AO4817
AO4817
Symbol
STATIC PARAMETERS
Min
Typ
Max
Units
BV
DSS
-30
V
-1
-5
±1
-3
T
J
=55°C
I
GSS
V
GS(th)
I
D(ON)
μ
A
-1
-40
-2.8
V
A
14.1
20
17.1
44
15
18
25
21
T
J
=125°C
m
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
S
V
A
-1
-2.6
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge
Gate Source Charge
Gate Drain Charge
1760
360
255
6.4
2200
pF
pF
pF
8
Q
g
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
30
7
8
12.5
10.5
40
23
24
16
38
nC
nC
nC
ns
ns
ns
ns
30
ns
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-8A, dI/dt=100A/
μ
s
A: The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
value in any given application depends on the user's specific board design. The current rating is based on the t
≤
10s thermal resistance
rating.
B: Repetitive rating, pulse width limited by junction temperature.
C. The R
θ
JA
is the sum of the thermal impedence from junction to lead R
θ
JL
and lead to ambient.
D. The static characteristics in Figures 1 to 6,12,14 are obtained using 80
μ
s pulses, duty cycle 0.5% max.
E. These tests are performed with the device mounted on 1 in
SOA curve provides a single pulse rating.
Rev 2 : Aug 2005
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250
μ
A, V
GS
=0V
V
DS
=-24V, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-20V, I
D
=-8A
Reverse Transfer Capacitance
Gate resistance
I
F
=-8A, dI/dt=100A/
μ
s
Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
I
DSS
μ
A
Gate Threshold Voltage
V
DS
=V
GS
I
D
=-250
μ
A
V
DS
=0V, V
GS
=±25V
Zero Gate Voltage Drain Current
Gate-Body leakage current
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Maximum Body-Diode Continuous Current
m
V
GS
=-10V, I
D
=-8A
V
GS
=-4.5V, I
D
=-4A
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-8A
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=-10V, V
DS
=-15V, R
L
=1.8
,
R
GEN
=3
V
GS
=0V, V
DS
=0V, f=1MHz
V
GS
=-10V, V
DS
=-15V, I
D
=-8A
Input Capacitance
Output Capacitance
Turn-On DelayTime
V
GS
=0V, V
DS
=-15V, f=1MHz
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The
Alpha & Omega Semiconductor, Ltd.
相關PDF資料
PDF描述
AO4817L Dual P-Channel Enhancement Mode Field Effect Transistor
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AO4818L Dual N-Channel Enhancement Mode Field Effect Transistor
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相關代理商/技術參數(shù)
參數(shù)描述
AO4817_10 制造商:AOSMD 制造商全稱:Alpha & Omega Semiconductors 功能描述:25V Dual P-Channel MOSFET
AO4817L 制造商:AOSMD 制造商全稱:Alpha & Omega Semiconductors 功能描述:Dual P-Channel Enhancement Mode Field Effect Transistor
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AO4818B 功能描述:MOSFET DUAL N-CH 30V 8.5A 8-SOIC RoHS:是 類別:分離式半導體產(chǎn)品 >> FET - 陣列 系列:- 產(chǎn)品目錄繪圖:8-SOIC Mosfet Package 標準包裝:1 系列:- FET 型:2 個 N 溝道（雙） FET 特點:邏輯電平門 漏極至源極電壓(Vdss):60V 電流 - 連續(xù)漏極(Id) @ 25° C:3A 開態(tài)Rds（最大）@ Id, Vgs @ 25° C:75 毫歐 @ 4.6A，10V Id 時的 Vgs(th)（最大）:3V @ 250µA 閘電荷(Qg) @ Vgs:20nC @ 10V 輸入電容 (Ciss) @ Vds:- 功率 - 最大:1.4W 安裝類型:表面貼裝 封裝/外殼:PowerPAK? SO-8 供應商設備封裝:PowerPAK? SO-8 包裝:Digi-Reel® 產(chǎn)品目錄頁面:1664 (CN2011-ZH PDF) 其它名稱:SI7948DP-T1-GE3DKR
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