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參數(shù)資料
| 型號： | AN8041S |
| 廠商： | PANASONIC CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Liquid crystal backlight control IC |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | PLASTIC, SOP-16 |
| 文件頁數(shù)： | 11/15頁 |
| 文件大?。?/td> | 153K |
| 代理商： | AN8041S |
11
Voltage Regulators
AN8041S
I
Application Note (continued)
[3] Function descriptions (continued)
4. Timer latch short-circuit protection circuit
When the short-circuit or overload of the power supply output continues for a certain period, this circuit
prevents the parts such as external main switch device, flywheel diode, the choke coil from destruction or deterioration.
The short-circuit protection circuit is shown in figure 4. The timer latch short-circuit protection circuit detects
the output level of the error amplifier 1 and 2 blocks. When either the DC-DC converter output voltage or the lamp
current detection voltage is stable, the output of that error amplifier is stabilized and the short-circuit protection
comparator also maintains balance.
When the load conditions are suddenly changed, and both of the outputs of the error amplifier 1 block and 2
block (FB1, FB2) become 1.82 V or higher, the short-circuit protection comparator outputs low-level and cut off
the transistor Q1, thereby the external capacitor C
S
of the S.C.P. terminal (pin 5) starts charging with current I
CHG
given by the following equation:
t
PE
[V]
C
S
t
PE
C
S
t
PE
[F]
0.72
I
CHG
is constant current which is determined by the timing resistor R
T
of the oscillator. It becomes approximately
2.3
μ
A when R
T
=
15 k
.
V
RT
×
1
[A]
R
T
×
11
When the external capacitor C
S
is charged to approximately 0.75 V, the latch circuit is set to fix the totem pole
output terminal to low-level and sets the dead-time to 100%.
When the latch circuit is set, the S.C.P. terminal voltage is discharged to approximately 30 mV. However, once
the latch circuit is set, it is not reset unless the power supply is turned off.
V
PE
=
V
STBY
+
I
CHG
×
0.75 V
=
0.03 V
+
I
CHG
×
C
S
=
I
CHG
×
I
CHG
=
FB1
6
7
8
S.C.P. comp.
Q1
Figure 4. Short-circuit protection circuit
Q2
Latch
IN
+
1
IN
1
Error amp. 1
Error amp. 2
FB2
11
10
9
IN
+
2
IN
2
1.82 V
5
I
CHG
S.C.P.
V
REF
C
S
Output cut-off
Q
S Q
R
5. Low input voltage malfunction prevention circuit (U.V.L.O.)
When the supply voltage is dropped under the transient condition such as power-on or operation stop, this
circuit protects the system from destruction or deterioration due to the malfunction of the control circuit.
This circuit detects the internal reference voltage which varies according to the supply voltage level. During
the period from the time when the supply voltage starts to rise and to the time when it reaches 3.1 V, it keeps the dead-
time of the Out terminal (pin 13) to 100% and maintains the DTC terminal (pin 4) and the S.C.P. terminal (pin 5) at
low-level. When the supply voltage falls, it holds the hysteresis width of 140 mV and operates at a voltage under
2.96 V.
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