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參數資料
| 型號： | AN8028 |
| 廠商： | PANASONIC CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Self-excited RCC pseudo-resonance type AC-DC switching power supply control IC |
| 中文描述： | 1 A SWITCHING CONTROLLER, PSIP9 |
| 封裝： | PLASTIC, SIP-9 |
| 文件頁數： | 7/13頁 |
| 文件大?。?/td> | 133K |
| 代理商： | AN8028 |
7
Voltage Regulators
AN8028
I
Application Notes (continued)
[1] Operation descriptions (continued)
3. Power supply output control system (FB : feedback)
The constant voltage control of the power supply output is achieved by fixing the off-period of the power
MOSFET and changing the on-period. The control of on-period is performed by changing the charge current from
the TON terminal to the C3 through the following process: the photocoupler connected to the FB terminal (pin 9)
absorbs, from the FB terminal, the feedback current corresponding to the output signal of the output voltage
detection circuit provided in the secondary side output. A current approximately 7 times of the current flowing out
of the FB terminal flows out of the TON terminal as the charge current for the C3. (Refer to figure 3.)
The higher the AC input voltage of the current becomes, or the smaller the load current becomes, the larger the
current flowing out of the FB terminal becomes. When the current flowing out of the FB terminal becomes larger,
the charging to C3 becomes faster and the on-period becomes shorter.
In addition, the system has cancellation capability of about 180
μ
A for the dark current of the photocoupler.
(Refer to figure 4.)
Figure 4. Feedback current versus charge current characteristics
0
I
FB
(mA)
I
TON
(mA)
0.2
0.4
0.6
0.8
1.0
2
4
6
8
10
Dark
current
Figure 3. Power supply output control system
1 : 7
AN1431T/M
Primary
side
Secondary
side
Secondary side power
supply output
200
PC
F
T
T
C2
PC
C3
R2
4. Pseudo-resonance operation (Power MOSFET turn-on delay circuit)
For the AN8028, the pseudo-resonance operation becomes possible by making connection as shown in figure 5.
The C7 is a resonance capacitor, and the R9 and C9 constitute the delay circuit for regulating the turn-on of power
MOSFET. When the power MOSFET is turned off, the voltage generated in the drive coil is inputted to the TDL
(time delay) terminal (pin 1) through the R9 and C9. While high-level signal (higher than threshold voltage 0.32
V) is inputted, the power MOSFET remains off. Also, the TDL terminal has the high/low-side clamping capability.
The upper limit of clamping voltage is 2.8 V typical (when sink current:
3 mA) and the lower limit of clamping
voltage is approximately 0 V typical (when source current: 3 mA). The off-period of the power MOSFET is
determined by the following periods whichever longer: the period until the TDL terminal input voltage becomes
a voltage lower than the threshold voltage as the transformer started the resonance operation and the drive coil
voltage drops, and the minimum off-period T
OFF(min)
of the internal oscillation circuit. (Refer to description on the
oscillation circuit.)
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