參數(shù)資料
型號(hào): AN8013SH
廠商: PANASONIC CORP
元件分類: 穩(wěn)壓器
英文描述: Single-channel step-up or step-down DC-DC converter control IC
中文描述: 0.1 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO10
封裝: SSOP-10
文件頁(yè)數(shù): 11/15頁(yè)
文件大?。?/td> 125K
代理商: AN8013SH
Voltage Regulators
AN8013SH
11
PWM
I
DTC
DTC
V
REF
C
DTC
R
DTC
I
DTC
=
×
[A]
V
RT
R
T
1
3.6
CT waveform
DTC
waveform
OUT
waveform
Off
Off
On
t
OFF
t
ON
V
CTH
V
DTC
V
CTL
Figure 4. Setting the dead-time
=
V
CTH
V
DTC
V
CTH
V
CTL
=
V
RT
×
[V]
R
DTC
R
T
1
3.6
FB
CT
Du
=
t
ON
t
ON
+
t
OFF
Example: When f
OSC
=
200 kHz (RT
=
15 k
, CT
=
150 pF)
V
CTH
1.45 V (typ.)
V
CTL
0.35 V (typ.)
V
RT
0.59 V (typ.)
I
DTC
11
μ
A (typ.)
×
100 [%]
×
100 [%]
×
V
DTC
=
I
DTC
×
R
DTC
I
Application Notes (continued)
[4] Setting the dead-time (maximum duty) (continued)
Adding the external resistor R
DTC
and the capacitor C
DTC
in parallel implements a soft start function that causes
the output pulse on width to increase gradually when the power supply is started. Use of this function can prevent
DC-DC converter output overshoot.
[5] Setting the time constant of the timer latch short-circuit protection circuit
The structural block diagram of protection latch circuit is shown in figure 5. The comparator for short-circuit
protection compares the output of error amplifier V
FB
with the reference voltage of 1.90 V all the time.
When the load conditions of DC-DC converter output are stabilized, there is no fluctuation of error amplifier output,
and the short-circuit protection comparator also keeps the balance. At this moment, the output transistor Q1 is in the
conductive state and the S.C.P. pin is hold to about 30 mV through the clamp circuit.
When the load conditions suddenly change, and high-level signal (1.90 V or higher) is input from the error amplifier
to the non-inverted input of the short-circuit protection comparator, the short-circuit protection comparator outputs
the low-level signal. Since this signal cuts off the output transistor Q1, the S.C.P. pin voltage V
PE
is released, and the
externally connected capacitor C
S
starts charging according to the following equation :
When the external capacitor C
S
has been charged up to about 0.75 V, it sets the latch circuit, cuts off the output drive
transistor by enabling the low input voltage malfunction prevention circuit, and sets the dead-time at 100%.
t
PE
[V]
C
S
t
PE
C
S
t
PE
[F]
0.72
V
PE
=
V
STBY
+
I
CHG
×
0.75 V
=
0.03 V
+
I
CHG
×
C
S
=
I
CHG
×
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