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參數(shù)資料
| 型號(hào)： | AN5295NK |
| 廠商： | PANASONIC CORP |
| 元件分類： | 音頻控制 |
| 英文描述： | 3-ch. sound signal processing single chip IC for TV with I2C bus |
| 中文描述： | 3 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP30 |
| 封裝： | 0.400 INCH, PLASTIC, SDIP-30 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大?。?/td> | 121K |
| 代理商： | AN5295NK |
ICs for TV
AN5295NK
9
I
Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
Description
Voltage (V)
27
ADD:
L+R (after AGC) output pin
6
28
C-In:
C-ch. input pin
6
29
V
CC
:
Power supply pin
12
30
L-In:
L-ch. input pin
6
27
200
50 k
1/2 V
CC
28
200
50 k
1/2 V
CC
30
I
Technical Information
I
2
C bus
1. DAC
1) Built-in 5 DAC controls and 8 switches
2) Incorporating auto-increment functions
(1) Sub address 0* : Auto-increment mode
(Data are inputted by the change of sub-address according to the transfer when data are sequentially transferred.)
(2) Sub address 8* : Data renewal mode
(Data are inputted with the same sub-address when data are sequentially transferred.)
3) I
2
C bus protocol
(1) Slave address: 10000000 (80H)
(2) Format (normal)
S Slave address
A
Sub address
A
(3) Auto-increment mode/data renewal mode
4) Typical data should be inputted at power on because initial state of DAC is not guaranteed.
Start condition
Data byte
A P
Acknowledge bit
Stop condition
S Slave address A
Sub address
A
Data 1
A
Data n
A
A
Data 2
P
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