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參數(shù)資料
| 型號： | AN2701 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | PWM Generation with the HC08 Timer |
| 中文描述： | PWM生成與HC08的計時器 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大小： | 158K |
| 代理商： | AN2701 |
Channel 1: PWM signal generated
Channel 2: Events
PWM Generation
PWM Generation with the HC08 Timer, Rev. 0
Freescale Semiconductor
7
Figure 3. Timer Correct Initialization
PWM Generation Without CPU Load
In many applications, it is useful to be able to generate a PWM signal and then not have to worry about
it. For example, to control LEDs illuminating a dashboard, the duty cycle and frequency do not have to be
constantly changed or monitored.
The HC08 timer can generate such a signal, without loading the MCU. This mode is called unbuffered
PWM generation. After the setup is done, the PWM signal is generated whatever is being executed
(except Reset, Break, and if the timer is stopped), without requiring any interrupt or instruction to be
executed.
The modulo counter value represents the period of the signal. The ratio between the values in the output
compare and modulo registers represents the duty cycle.
This method is simple to use and can be implemented as follows.
If the timer is configured to be reset on output compare and to toggle on overflow, the timer output state
when it starts to count will be logic 0. When the output compare value is reached, the output is already at
logic 0 and will only toggle to logic 1 when the first overflow occurs.
The user should be aware that the first pulse may appear to be missing.
It is possible to have this pulse earlier by inverting the signal. If the timer sets the output on output
compare (bit ELSxA at logic 1 in the timer status and control register — see
Table 2
) instead of resetting
it (keeping toggle-on-overflow bits MSxA and MSxB at logic 0), then the greater the duty cycle, the earlier
the first pulse occurs.
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