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參數(shù)資料
| 型號(hào)： | AN1568D |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Interfacing Between LVDS and ECL |
| 中文描述： | 接口之間的LVDS和ECL |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 88K |
| 代理商： | AN1568D |
AN1568/D
http://onsemi.com
6
Figure 12. Interfacing 2.5 V LVPECL to LVDS with
Series R
S
and Internal 100 Termination Resistor
100
LVPECL
2.5 V
V
CC
R
T
R
T
LVDS
Z
O
Z
O
R
S
R
S
Figure 13. PSPICE Simulation Levels of 2.5V LVPECL
to LVDS Interface with Series R
S
Resistor
1.30 V
0.87 V
430 mV
LVDS
Input
2.5 V LVPECL
Output
Where R
T
= 75
R
S
= 43
Interfacing from 3.3 V LVPECL to LVDS
Since the output levels V
OH
and V
OL
of 3.3 V LVPECL
are more positive than the input range of LVDS receiver,
special interface is required. (See Figures 14 and 15).
Furthermore, the open emitter design of the ECL output
structure need proper termination, which can be
incorporated with the resistor divider network to generate a
proper LVDS DC levels (eq. 1).
R1
R2
RT
(eq. 1)
The resistor divider network will divide the output
common mode voltage of LVPECL (V
CM
(LVPECL)) to
input common mode voltage of LVDS (V
CM
(LVDS)).
VCM(LVDS)
VCM(LVPECL)
R2
R1
R2
(eq. 2)
Where:
R
T
= Termination Resistor
V
CM
(LVPECL) = Common Mode Voltage
V
CM
(LVDS) = Common Mode Voltage
3.3 V LVPECL will be able to drive LVDS receiver with
and without internal 100
termination resistor. The above
equations may give nonstandard resistor values and when
choosing resistors off the shelf, to avoid cutoff condition
under worstcase scenario.
Figure 14. Interfacing 3.3 V LVPECL to LVDS
LVPECL
LVDS
3.3 V
V
CC
R1
R1
R2
R2
Z
O
Z
O
Z
O
Z
O
100
Figure 15. Interfacing LVPECL to LVDS with Internal
100 Termination Resistor
Examples:
For 50
controlled impedance, the resistor values for
3.3V LVPECL converted to LVDS voltage levels are as
follows:
LVPECL
LVDS
3.3 V
V
CC
R1
R1
R2
R2
100
Z
O
Z
O
Z
O
Z
O
R
1
= 55
R
2
= 95
R
T
= 150
V
CM
(LVPECL) = 1.9 V
V
CM
(LVDS) = 1.2 V
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