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參數(shù)資料
| 型號： | AN101 |
| 廠商： | Vishay Intertechnology,Inc. |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:3; Series:MS27508; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:8; Circular Contact Gender:Pin; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:8-98 RoHS Compliant: No |
| 中文描述： | MOSFET的 |
| 文件頁數(shù)： | 2/5頁 |
| 文件大小： | 44K |
| 代理商： | AN101 |
AN101
2
Siliconix
10-Mar-97
In addition to the channel material, a JFET contains two
ohmic (non-rectifying) contacts: the source and the drain.
These are shown in Figure 2. Since a symmetrical geome-
try is shown in the idealized JFET chip, it is immaterial
which contact is called the source and which is called the
drain; the JFET will conduct current equally well in either
direction and the source and drain leads are usually inter-
changeable.
N-Source
N-Drain
P-Gate
Final form taken by FET with n-type channel embedded in p-type
substrate.
N-Channel
Figure 2.
Idealized Structure of An N-Channel
Junction FET
(For certain JFET applications, such as high-frequency
amplifiers, an asymmetrical geometry is preferred for
lower capacitance and improved frequency response. In
these cases, the source and drain leads should not be inter-
changed.)
Figure 3 shows how the JFET functions. If the gate is con-
nected to the source, then the applied voltage (V
DS
) will
appear between the gate and the drain. Since the pn junc-
tion is reverse-biased, little current will flow in the gate
connection. The potential gradient established will form
a depletion layer, where almost all the electrons present
in the n-type channel will be swept away. The most de-
pleted portion is in the high field between the gate and the
drain, and the least-depleted area is between the gate and
the source. Because the flow of current along the channel
from the (positive) drain to the (negative) source is really
a flow of free electrons from source to drain in the n-type
silicon, the magnitude of this current will fall as more sili-
con becomes depleted of free electrons. There is a limit
to the drain current (I
D
) which increased V
DS
can drive
through the channel. This limiting current is known as
I
DSS
(Drain-to-Source current with the gate shorted to the
source). Figure b shows the almost complete depletion of
the channel under these conditions.
Figure 3c shows the output characteristics of an n-channel
JFET with the gate short-circuited to the source. The
initial rise in I
D
is related to the buildup of the depletion
layer as V
DS
increases. The curve approaches the level of
the limiting current I
DSS
when I
D
begins to be pinched off.
The physical meaning of this term leads to one definition
of pinch-off voltage, V
P
, which is the value of V
DS
at
which the maximum I
DSS
flows.
P
S
D
N
G
Depletion
Layer
P
V
DS
< V
P
P
S
D
N
G
Depletion
Layer
P
V
DS
> V
P
Saturation Region
I
DSS
V
GS
= 0 V
I
D
V
DS
V
P
Figure 3.
3a)
N-Channel FET Working in the Ohmic Region (V
GS
=
0 V) (Depletion Shown Only in Channel Region)
3b)
N-Channel FET Working in the Current Saturation
Region (V
GS
= 0)
3c)
Idealized Output Characteristic for V
GS
= 0
Channel
Current
Ohmic
Region
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