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參數(shù)資料
| 型號： | AMIS49587C5872RG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 16/55頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MODEM PLC 50/60MHZ 52QFN |
| 標準包裝： | 2,500 |
| 波特率： | 可選 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 52-QFN（8x8） |
| 包裝： | 帶卷 (TR) |
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AMIS49587
http://onsemi.com
23
must start at it’s 0 phase position, corresponding with a 0 V
output level. When switching between fM and fS the phase
accumulator must give a continuous phase and not restart
from phase 0.
When AMIS49587 goes into receive mode (when
TX_RXB goes from 1 to 0) the sine wave generator must
make sure to complete the active sine period.
The control logic for the transmitter generates a signal
TX_ENB to enable the external power amplifier. TX_ENB
is 1 when the AMIS49587 is in receive mode. TX_ENB is
0 when AMIS49587 is in transmit mode. When going from
transmit to receive mode (TX_RXB goes from 1 to 0) the
TX_ENB signal is kept active for a short period of tdTX_ENB.
The control logic for the transmitter generates a signal
TX_DATA which corresponds to the transmitted SFSK
signal. When transmitting fM TX_DATA is logic 1. When
transmitting fS TX_DATA is logic 0. When the transmitter
is not enabled (TX_RXB = 0) TX_DATA goes to logic 1 at
the next BIT_CLK.
Figure 18. TX_ENB Timing
TX_OUT
TX_ENB
TX_RXB
TX_DATA
BIT_CLK
tdTX_ENB
6.2.3 DA Converter
A digital to analog
SD converter converts the sine wave
digital word to a pulse density modulated (PDM) signal. The
PDM signal is converted to an analog signal with a first order
switched capacitor filter.
6.2.4 Low Pass Filter
A 3rd order continuous time low pass filter in the transmit
path filters the quantization noise and noise generated by the
SD DA converter. The low pass filter has a circuit which
tunes the RC time constants of the filter towards the process
characteristics. The C values for the LPF filter are controlled
by the ARM micro controller.
6.2.5 Amplifier with Automatic Level Control (ALC)
The pin ALC_IN is used for level control of the
transmitter output level. First a peak detection is done. The
peak value is compared to 2 thresholds levels: VTLALC_IN
and VTHALC_IN. The result of the peak detection is used to
control the setting of the level of TX_OUT. The level of
TX_OUT can be attenuated in 8 steps of 3 dB typical.
After hard or soft reset the level is set at minimum level
(maximum attenuation) When going to reception mode
(when TX_RXB goes from 1 to 0) the level is kept in
memory so that the next transmit frame starts with the old
level. The evaluation of the level is done during 1
CHIP_CLK period.
Depending on the value of peak level on ALC_IN the
attenuation is updated:
VpALC_IN < VTLALC: Increase the level with 1 step
VTLALC ≤ VpALC_IN ≤ VTHALC: Don’t change the
level
VpALC_IN > VTHALC: Decrease the level with 1 step
The gain changes in the next CHIP_CLK period.
An evaluation phase and a level adjustment takes 2
CHIP_CLK periods. ALC operation is enabled only during
the first 16 CHIP_CLK cycles after a hard or soft reset or
after going into transmit mode.
The automatic level control can be disabled by setting
register R_ALC_CTRL[3] = 1. In this case the transmitter
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