參數(shù)資料
型號(hào)： AMDDURON
英文描述： AMD Duron - AMD Duron Processor Model 3 Revision Guide
中文描述： AMD的毒龍- AMD的Duron處理器的型號(hào)3次指南
文件頁(yè)數(shù)： 9/21頁(yè)
文件大小： 183K
代理商： AMDDURON
9
23865K—October 2003
AMD Duron Processor Model 3 Revision Guide
Preliminary Information
11
PLL Overshoot on Wake-Up from Disconnect Causes Auto-Compensation Circuit to Fail
Products Affected.
A0, A2
Normal Specified Operation.
The AMD Duron processor model 3 PLL should return to the normal operating
frequency when reconnecting to the system bus after a disconnect where the PLL was reduced to a
lower operating frequency.
Non-conformance.
The AMD Duron processor model 3 PLL can exceed the normal operating frequency
when reconnecting to the system bus after a disconnect, causing a failure to maintain sufficient system
bus I/O drive strength levels in the driver compensation circuit. The compensation circuit attempts to
correct the drive strength, but if there is not sufficient time to perform this function, the system bus
cannot operate properly.
Potential Effect on System.
The system hangs.
Suggested Workaround.
The event can be avoided through BIOS manipulation of the reconnect timing
using the CLK_CTRL MSR. (See
AMD Athlon and AMD Duron Processor CLK_CTRL MSR Settings
,
order# 24478, for exact values.)
The time for the PLL to overshoot can be greatly shortened to reduce it to a very small time period that
does not enable the failure, and the time between the rampup and the reconnect to the system bus can
be increased such that a failure in the compensation circuit has enough time to recover before
reconnecting to the bus.
Resolution Status.
Fixed in future revisions.
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