參數(shù)資料
型號： AM79C960
廠商： Advanced Micro Devices, Inc.
英文描述： PCnetTM-ISA Single-Chip Ethernet Controller
中文描述： PCnetTM -的ISA單芯片以太網(wǎng)控制器
文件頁數(shù)： 68/127頁
文件大?。?/td> 814K
代理商： AM79C960
P R E L I M I N A R Y
AMD
1-410
Am79C960
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Current Receive Byte Count.
This field is a copy of the BCNT
field of RMD2 of the current re-
ceive descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
11-0
CRBC
CSR42-43: Current Transmit Status and Byte
Count
Bit
Name
Description
31-24
CXST
Current Transmit Status. This
field is a copy of bits 15:8 of
TMD1 of the current transmit
descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Current Transmit Byte Count.
This field is a copy of the BCNT
field of TMD2 of the current trans-
mit descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
11-0
CXBC
CSR44-45: Next Receive Status and Byte Count
Bit
Name
Description
31-24
NRST
Next Receive Status. This field is
a copy of bits 15:8 of RMD1 of the
next receive descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Next Receive Byte Count. This
field is a copy of the BCNT field of
RMD2 of the next receive
descriptor.
Read/write accessible only when
STOP bit is set.
23-12
RES
11-0
NRBC
CSR46: Poll Time Counter
Bit
Name
Description
15-0
POLL
Poll Time Counter. This counter
is incremented by the PCnet-ISA
controller microcode and is used
to trigger the descriptor ring poll-
ing operation of the PCnet-ISA
controller.
Read/write accessible only when
STOP bit is set.
CSR47: Polling Interval
Bit
Name
Description
31-16
RES
Reserved locations. Written as
zero and read as undefined.
Polling Interval. This register
contains the time that the
PCnet-ISA controller will wait
between successive polling op-
erations. The POLLINT value is
expressed as the two’s comple-
ment of the desired interval,
where each bit of POLLINT rep-
resents one-half of an XTAL1
period of time. POLLINT[3:0] are
ignored. (POLINT[16] is implied
to be a one, so POLLINT[15] is
significant, and does not repre-
sent the sign of the two’s
complement POLLINT value.)
The default value of this register
is 0000. This corresponds to a
polling interval of 32,768 XTAL1
periods. The POLINT value of
0000 is created during the
microcode initialization routine,
and therefore might not be seen
when reading CSR47 after
RESET.
If the user desires to program a
value for POLLINT other than the
default, then the correct proce-
dure is to first set INIT only in
CSR0. Then, when the initializa-
tion sequence is complete, the
user must set STOP in CSR0.
Then the user may write to
CSR47 and then set STRT in
CSR0. In this way, the default
value of 0000 in CSR47 will be
overwritten with the desired user
value.
Read/write accessible only when
STOP bit is set.
15-0 POLLINT
CSR48-49: Temporary Storage
Bit
Name
Description
31-0
TMP0
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
相關(guān)PDF資料
PDF描述
AM79C960KC PCnetTM-ISA Single-Chip Ethernet Controller
AM79C960KCW PCnetTM-ISA Single-Chip Ethernet Controller
AM79C961AKCW PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961AKC PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
AM79C961A PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C960KC 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-ISA Single-Chip Ethernet Controller
AM79C960KC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller
AM79C960KCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-ISA Single-Chip Ethernet Controller
AM79C961 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA
AM79C961/AM79C961A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Using the Am79C961/Am79C961A (PCnet-ISA+/PCnet-ISA II) Survival Guide? 134KB (PDF)
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