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參數(shù)資料
| 型號： | AM79C960 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnetTM-ISA Single-Chip Ethernet Controller |
| 中文描述： | PCnetTM -的ISA單芯片以太網(wǎng)控制器 |
| 文件頁數(shù)： | 55/127頁 |
| 文件大?。?/td> | 814K |
| 代理商： | AM79C960 |
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P R E L I M I N A R Y
AMD
1-397
Am79C960
It is the responsibility of upper layer software to correctly
define the actual length field contained in the message
to correspond to the total number of LLC Data bytes en-
capsulated in the packet (length field as defined in the
IEEE 802.3 standard). The length value contained in the
message is not used by the PCnet-ISA controller to
compute the actual number of pad bytes to be inserted.
The PCnet-ISA controller will append pad bytes de-
pendent on the actual number of bits transmitted onto
the network. Once the last data byte of the frame has
completed prior to appending the FCS, the PCnet-ISA
controller will check to ensure that 544 bits have been
transmitted. If not, pad bytes are added to extend the
frame size to this value, and the FCS is then added.
The 544 bit count is derived from the following:
Minimum frame size (excluding preamble,
including FCS)
64 bytes
512 bits
Preamble/SFD size
8 bytes
64 bits
FCS size
4 bytes
32 bits
To be classed as a minimum-size frame at the receiver,
the transmitted frame must contain:
Preamble
+
(Min Frame Size + FCS) bits
At the point that FCS is to be appended, the transmitted
frame should contain:
Preamble
64
+
+
(Min Frame Size - FCS) bits
(512
-
32) bits
A minimum-length transmit frame from the PCnet-ISA
controller will, therefore, be 576 bits after the FCS is
appended.
Transmit FCS Generation
Automatic generation and transmission of FCS for a
transmit frame depends on the value of DXMTFCS bit in
CSR15. When DXMTFCS = 0 the transmitter will gener-
ate and append the FCS to the transmitted frame. If the
automatic padding feature is invoked (APAD_XMT is
SET in CSR4), the FCS will be appended by the
PCnet-ISA controller regardless of the state of
DXMTFCS. Note that the calculated FCS is transmitted
most-significant bit first. The default value of DXMTFCS
is 0 after RESET.
Transmit Exception Conditions
Exception conditions for frame transmission fall into two
distinct categories; those which are the result of normal
network operation, and those which occur due to abnor-
mal network and/or host related events.
Normal events which may occur and which are handled
autonomously by the PCnet-ISA controller are basically
collisions within the slot time with automatic retry. The
PCnet-ISA controller will ensure that collisions which
occur within 512 bit times from the start of transmission
(including preamble) will be automatically retried with no
host intervention. The transmit FIFO ensures this by
guaranteeing that data contained within the FIFO will
not be overwritten until at least 64 bytes (512 bits) of
data have been successfully transmitted onto the net-
work.
If 16 total attempts (initial attempt plus 15 retries) fail, the
PCnet-ISA controller sets the RTRY bit in the current
transmit TDTE in host memory (TMD2), gives up owner-
ship (sets the OWN bit to zero) for this packet, and
processes the next packet in the transmit ring for trans-
mission.
Abnormal network conditions include:
I
Loss of carrier
I
Late collision
I
SQE Test Error (does not apply to 10BASE-T port)
These should not occur on a correctly configured 802.3
network, and will be reported if they do.
When an error occurs in the middle of a multi-buffer
frame transmission, the error status will be written in the
current descriptor. The OWN bit(s) in the subsequent
descriptor(s) will be reset until the STP (the next frame)
is found.
Loss of Carrier
A loss of carrier condition will be reported if the
PCnet-ISA controller cannot observe receive activity
while it is transmitting on the AUI port. After the
PCnet-ISA controller initiates a transmission, it will
expect to see data “l(fā)ooped back” on the DI
±
pair. This
will internally generate a “carrier sense,” indicating that
the integrity of the data path to and from the MAU is in-
tact, and that the MAU is operating correctly. This
“carrier sense” signal must be asserted before the end
of the transmission. If “carrier sense” does not become
active in response to the data transmission, or becomes
inactive before the end of transmission, the loss of car-
rier (LCAR) error bit will be set in TMD2 after the frame
has been transmitted. The frame will not be re-tried on
the basis of an LCAR error. In 10BASE-T mode LCAR
will indicate that Jabber or Link Fail state has occurred.
Late Collision
A late collision will be reported if a collision condition oc-
curs after one slot time (512 bit times) after the transmit
process was initiated (first bit of preamble commenced).
The PCnet-ISA controller will abandon the transmit
process for the particular frame, set Late Collision
(LCOL) in the associated TMD3, and process the next
transmit frame in the ring. Frames experiencing a late
collision will not be re-tried. Recovery from this condition
must be performed by upper-layer software.
SQE Test Error
During the inter packet gap time following the comple-
tion of a transmitted message, the AUI CI
±
pair is
asserted by some transceivers as a self-test. The inte-
gral Manchester Encoder/Decoder will expect the SQE
Test Message (nominal 10 MHz sequence) to be re-
turned via the CI
±
pair within a 40 network bit time period
after DI
±
pair goes inactive. If the CI
±
inputs are not
asserted within the 40 network bit time period following
相關PDF資料 |
PDF描述 |
|---|---|
| AM79C960KC | PCnetTM-ISA Single-Chip Ethernet Controller |
| AM79C960KCW | PCnetTM-ISA Single-Chip Ethernet Controller |
| AM79C961AKCW | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961AKC | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
| AM79C961A | PCnet ⑩-ISA II Jumperless, Full Duplex Single-Chip Ethernet Controller for ISA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C960KC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-ISA Single-Chip Ethernet Controller |
| AM79C960KC/W | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LAN Node Controller |
| AM79C960KCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnetTM-ISA Single-Chip Ethernet Controller |
| AM79C961 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am79C961 - PCnet-ISA+ Jumperless Single-Chip Ethernet Controller for ISA |
| AM79C961/AM79C961A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Using the Am79C961/Am79C961A (PCnet-ISA+/PCnet-ISA II) Survival Guide? 134KB (PDF) |
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