參數(shù)資料
型號(hào)： Am70PDL129CDH66IT
廠商： Advanced Micro Devices, Inc.
英文描述： 2 x 64 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-Only Page Mode Flash Memory Data Storage 128 Megabit (8 M x 16-Bit) CMOS
中文描述： 2 × 64兆位（8米× 16位）的CMOS 3.0伏特，只有頁(yè)面模式閃存數(shù)據(jù)存儲(chǔ)128兆位（8米× 16位）的CMOS
文件頁(yè)數(shù)： 8/127頁(yè)
文件大?。?/td> 849K
代理商： AM70PDL129CDH66IT
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Am70PDL127CDH/Am70PDL129CDH
November 24, 2003
A D V A N C E I N F O R M A T I O N
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 9
MCP Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . 9
Connection Diagram–PDL129H . . . . . . . . . . . . . . 10
Special Package Handling Instructions ..................................10
Connection Diagram–PDL127H . . . . . . . . . . . . . . 11
Special Package Handling Instructions ..................................11
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Ordering Information . . . . . . . . . . . . . . . . . . . . . .13
Requirements for Reading Array Data ...................................16
Random Read (Non-Page Read) ........................................16
Page Mode Read ................................................................16
Table 2. Page Select .......................................................................16
Simultaneous Operation .........................................................16
Table 3. Bank Select (PDL129H) ....................................................16
Table 4. Bank Select (PDL127H) ....................................................16
Writing Commands/Command Sequences ............................17
Accelerated Program Operation ..........................................17
Autoselect Functions ...........................................................17
Standby Mode ........................................................................ 17
Automatic Sleep Mode ...........................................................17
RESET#: Hardware Reset Pin ...............................................18
Output Disable Mode ..............................................................18
Table 5. SecSi
TM
Sector Addresses ................................................18
Table 6. Am29PDL127H Sector Architecture ..................................19
Table 7. Am29PDL129H Sector Architecture ..................................26
Table 8. Am29PDL127H Boot Sector/Sector Block Addresses for Pro-
tection/Unprotection ........................................................................34
Table 9. Am29PDL129H Boot Sector/Sector Block Addresses for Pro-
tection/Unprotection
CE#f1 Control ..................................................................................35
Table 10. Am29PDL129H Boot Sector/Sector Block Addresses for
Protection/Unprotection
CE#f2 Control ..................................................................................35
Sector Protection. . . . . . . . . . . . . . . . . . . . . . . . . 36
Persistent Sector Protection ...................................................36
Persistent Protection Bit (PPB) ............................................36
Persistent Protection Bit Lock (PPB Lock) ..........................36
Dynamic Protection Bit (DYB) .............................................36
Table 11. Sector Protection Schemes .............................................37
Persistent Sector Protection Mode Locking Bit ...................37
Password Protection Mode .....................................................37
Password and Password Mode Locking Bit ........................38
64-bit Password ...................................................................38
Write Protect (WP#) ................................................................38
Persistent Protection Bit Lock ..............................................38
High Voltage Sector Protection ..............................................39
Figure 1. In-System Sector Protection/
Sector Unprotection Algorithms ...................................................... 40
Temporary Sector Unprotect ..................................................41
Figure 2. Temporary Sector Unprotect Operation........................... 41
SecSi (Secured Silicon) Sector
Flash Memory Region ............................................................41
Factory-Locked Area (64 words) .........................................41
Customer-Lockable Area (64 words) ...................................41
Figure 3. PDL127/9H SecSi Sector Protection Algorithm............... 42
SecSi Sector Protection Bits ................................................42
Hardware Data Protection ......................................................43
Low VCC Write Inhibit .........................................................43
Write Pulse “Glitch” Protection ............................................43
Logical Inhibit .......................................................................43
Power-Up Write Inhibit .........................................................43
Command Definitions . . . . . . . . . . . . . . . . . . . . . 47
Reading Array Data ................................................................47
Reset Command .....................................................................47
Autoselect Command Sequence ............................................47
Enter SecSi Sector/Exit SecSi Sector
Command Sequence ..............................................................48
Word Program Command Sequence ......................................48
Unlock Bypass Command Sequence ..................................48
Figure 4. Program Operation ......................................................... 49
Chip Erase Command Sequence ...........................................49
Sector Erase Command Sequence ........................................49
Figure 5. Erase Operation.............................................................. 50
Erase Suspend/Erase Resume Commands ...........................50
Password Program Command ................................................50
Password Verify Command ....................................................51
Password Protection Mode Locking Bit Program Command ..51
Persistent Sector Protection Mode Locking Bit Program Com-
mand .......................................................................................51
SecSi Sector Protection Bit Program Command ....................51
PPB Lock Bit Set Command ...................................................51
DYB Write Command .............................................................51
Password Unlock Command ..................................................52
PPB Program Command ........................................................52
All PPB Erase Command ........................................................52
DYB Write Command .............................................................52
PPB Lock Bit Set Command ...................................................52
PPB Status Command ............................................................52
PPB Lock Bit Status Command ..............................................52
Sector Protection Status Command .......................................52
Command Definitions Tables .................................................. 53
Table 16. Memory Array Command Definitions ............................. 53
Table 17. Sector Protection Command Definitions ........................ 54
Write Operation Status . . . . . . . . . . . . . . . . . . . . 55
DQ7: Data# Polling .................................................................55
Figure 6. Data# Polling Algorithm .................................................. 55
RY/BY#: Ready/Busy# ............................................................ 56
DQ6: Toggle Bit I ....................................................................56
Figure 7. Toggle Bit Algorithm........................................................ 56
DQ2: Toggle Bit II ...................................................................57
Reading Toggle Bits DQ6/DQ2 ...............................................57
DQ5: Exceeded Timing Limits ................................................57
DQ3: Sector Erase Timer .......................................................57
Table 18. Write Operation Status ................................................... 58
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 59
Figure 8. Maximum Negative Overshoot Waveform...................... 59
Figure 9. Maximum Positive Overshoot Waveform........................ 59
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 60
pSRAM DC Characteristics . . . . . . . . . . . . . . . . . 61
Recommended DC Operating Conditions (Note 1) ................61
Capacitance (f= 1MHz, TA = 25×C) .......................................61
DC and Operating Characteristics ..........................................61
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 10. Test Setup, VIO = 2.7 – 3.1 V...................................... 62
Figure 11. Input Waveforms and Measurement Levels ................. 62
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