參數(shù)資料
型號(hào)： AM49DL32XBG
英文描述： Am49DL32xBG - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
中文描述： Am49DL32xBG -堆疊式多芯片封裝（MCP）閃存和SRAM
文件頁數(shù)： 34/62頁
文件大?。?/td> 933K
代理商： AM49DL32XBG
32
Am49DL3208G
September 19, 2003
A D V A N C E I N F O R M A T I O N
Table 13.
Write Operation Status
Notes:
1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits.
Refer to the section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further
details.
3. When reading write operation status bits, the system must always provide the bank address where the Embedded Algorithm
is in progress. The device outputs array data if the system addresses a non-busy bank.
Status
DQ7
(Note 2)
DQ7#
0
DQ6
Toggle
Toggle
DQ5
(Note 1)
0
0
DQ3
N/A
1
DQ2
(Note 2)
No toggle
Toggle
RY/BY#
0
0
Standard
Mode
Embedded Program Algorithm
Embedded Erase Algorithm
Erase
Suspend
Mode
Erase-Suspend-
Read
Erase
Suspended Sector
Non-Erase
Suspended Sector
1
No toggle
0
N/A
Toggle
1
Data
Data
Data
Data
Data
1
Erase-Suspend-Program
DQ7#
Toggle
0
N/A
N/A
0
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