參數(shù)資料
型號(hào)： AM49BDS640AHE9I
廠商： SPANSION LLC
元件分類(lèi)： 存儲(chǔ)器
英文描述： Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA89
封裝： 10 X 8 MM, FBGA-89
文件頁(yè)數(shù)： 40/84頁(yè)
文件大?。?/td> 763K
代理商： AM49BDS640AHE9I
38
Am49BDS640AH
December 5, 2003
A D V A N C E I N F O R M A T I O N
14. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
15. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
16. See “Set Configuration Register Command Sequence” for details.
17. Command is valid when device is ready to read array data or
when device is in autoselect mode.
18. The Reset command returns the device to reading the array.
19. Regardless of CLK and AVD# interaction or Control Register bit
15 setting, command mode verifies are always asynchronous
read operations.
20. ACC must be at V
HH
during the entire operation of this command
21. The fourth cycle programs the addressed locking bit. The fifth and
sixth cycles are used to validate whether the bit has been fully
programmed. If DQ0 (in the sixth cycle) reads 0, the program
command must be issued and verified again.
22. The fourth cycle erases all PPBs. The fifth and sixth cycles are
used to validate whether the bits have been fully erased. If DQ0
(in the sixth cycle) reads 1, the erase command must be issued
and verified again.
23. The entire four bus-cycle sequence must be entered for each
portion of the password.
24. Before issuing the erase command, all PPBs should be
programmed in order to prevent over-erasure of PPBs.
25. In the fourth cycle, 01h indicates PPB set; 00h indicates PPB not
set.
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