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參數(shù)資料
| 型號(hào)： | AM42DL16X4D |
| 英文描述： | 150NS, PLCC, IND TEMP(EEPROM) |
| 中文描述： | Am42DL16x4D -堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁(yè)數(shù)： | 53/60頁(yè) |
| 文件大小： | 956K |
| 代理商： | AM42DL16X4D |
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52
Am42DL16x2D
March 4, 2002
P R E L I M I N A R Y
AC CHARACTERISTICS
Figure 29.
SRAM Read Cycle
Notes:
1. WE# = V
IH
, if CIOs is low, ignore UB#s/LB#s timing.
1. t
HZ
and t
OHZ
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
2. At any given temperature and voltage condition, t
HZ
(Max.) is less than t
LZ
(Min.) both for a given device and from device to device
interconnection.
Data Valid
High-Z
t
RC
CE#1s
Address
OE#
Data Out
t
OH
t
AA
t
CO1
t
OE
t
OLZ
t
BLZ
t
LZ
t
OHZ
t
HZ
CE2s
t
CO2
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