參數(shù)資料
型號: AM41PDS3228DT10IT
廠商: ADVANCED MICRO DEVICES INC
元件分類: 存儲器
英文描述: 32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation, Page Mode Flash Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Static RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封裝: 8 X 11.60 MM, FBGA-73
文件頁數(shù): 42/59頁
文件大小: 560K
代理商: AM41PDS3228DT10IT
May 13, 2002
Am41PDS3228D
41
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
Flash Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Flash Erase And Programming Performance” section for more information.
Parameter
Speed Options
Unit
JEDEC
Std
Description
10
11
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
100
110
ns
t
AVWL
t
AS
Address Setup Time (WE# to Address)
Min
0
ns
t
ASO
Address Setup Time to OE# or
CE#f
Low During Toggle Bit
Polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time (WE# to Address)
Min
60
ns
t
AHT
Address Hold Time From CE#f or OE# High During Toggle Bit
Polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
60
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEH
OE# Hold Time
Read
Min
0
ns
Toggle and Data# Polling
Min
20
ns
t
OEPH
Output Enable High During Toggle Bit Polling
Min
20
ns
t
GHEL
t
GHEL
Read Recovery Time Before Write (OE# High to CE#f Low)
Min
0
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
t
WLEL
t
WS
WE# Setup Time (CE#f to WE#)
Min
0
ns
t
ELWL
t
CS
CE#f Setup Time (WE# to CE#f)
Min
0
ns
t
EHWH
t
WH
WE# Hold Time (CE#f to WE#)
Min
0
ns
t
WHEH
t
CH
CE#f Hold Time (CE#f to WE#)
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
60
ns
t
ELEH
t
CP
CE#f Pulse Width
Min
60
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
60
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Typ
11
μs
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte (Note 2)
Typ
5
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
1
sec
t
VCS
V
CC
f Setup Time (Note 1)
Min
50
μs
t
RB
Write Recovery Time From RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid To RY/BY# Delay
Max
90
ns
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