參數(shù)資料
型號: AM41PDS3224D
英文描述: 32 Mbit (2 M x 16-Bit) CMOS 1.8 Volt-only. Simultaneous Operation Page Mode Flash Memory and 4 Mbit (512 K x 8-Bit/256 K x 16-Bit) Static RAM (Preliminary)
中文描述: 32兆位(2米× 16位)的CMOS電壓1.8只。同時采取行動,頁面模式閃存和4兆位(512畝x 8-Bit/256畝x 16位),靜態(tài)存儲器(初步)
文件頁數(shù): 27/59頁
文件大小: 1068K
代理商: AM41PDS3224D
26
Am41PDS3224D
May 13, 2002
P R E L I M I N A R Y
erase-suspended. Refer to the Flash Write Operation
Status section for information on these status bits.
After an erase-suspended program operation is com-
plete, the device returns to the erase-suspend-read
mode. The system can determine the status of the
program operation using the DQ7 or DQ6 status bits,
just as in the standard word program operation.
Refer to the Flash Write Operation Status section for
more information.
In the erase-suspend-read mode, the system can also
issue the autoselect command sequence. Refer to the
Autoselect Mode and Autoselect Command Sequence
sections for details.
To resume the sector erase operation, the system
must write the Erase Resume command. The address
of the erase-suspended sector is required when writ-
ing this command. Further writes of the Resume com-
mand are ignored. Another Erase Suspend command
can be written after the chip has resumed erasing.
Notes:
1. See Table 10 for erase command sequence.
2. See the section on DQ3 for information on the sector
erase timer.
Figure 5.
Erase Operation
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
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