參數(shù)資料
型號(hào): AM41DL6408H8H71IS
廠商: Advanced Micro Devices, Inc.
元件分類: 圓形連接器
英文描述: Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVP00; No. of Contacts:6; Connector Shell Size:11; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
中文描述: 堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁數(shù): 61/66頁
文件大?。?/td> 1123K
代理商: AM41DL6408H8H71IS
November 24, 2003
Am41DL6408H
59
A D V A N C E I N F O R M A T I O N
FLASH ERASE AND PROGRAMMING PERFORMANCE
Notes:
1.
Typical program and erase times assume the following conditions: 25
°
C, 3.0 V V
CC
, 1,000,000 cycles. Additionally, programming typicals
assume checkerboard pattern.
Under worst case conditions of 90
°
C, V
CC
= 2.7 V 1,000,000 cycles.
The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes program faster than the
maximum program times listed.
In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 14 for further
information on command definitions. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
2.
3.
4.
5.
LATCHUP CHARACTERISTICS
Note:
Includes all pins except V
CC
. Test conditions: V
CC
= 3.0 V, one pin at a time.
PACKAGE PIN CAPACITANCE
Notes:
1.
2.
Sampled, not 100% tested.
Test conditions T
A
= 25°C, f = 1.0 MHz.
DATA RETENTION
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
0.4
5
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
56
sec
Byte Program Time
5
150
μs
Excludes system level
overhead (Note 5)
Accelerated Byte/Word Program Time
4
120
μs
Word Program Time
7
210
μs
Chip Program Time
(Note 3)
Byte Mode
42
126
sec
Word Mode
28
84
Description
Min
Max
Input voltage with respect to V
on all pins except I/O pins
(including A9, OE#, and RESET#)
–1.0 V
12.5 V
Input voltage with respect to V
SS
on all I/O pins
–1.0 V
V
CC
+ 1.0 V
V
CC
Current
–100 mA
+100 mA
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
C
IN
Input Capacitance
V
IN
= 0
TSOP
6
7.5
Fine-pitch
BGA
4.2
5.0
C
OUT
Output Capacitance
V
OUT
= 0
TSOP
8.5
12
Fine-pitch
BGA
5.4
6.5
C
IN2
Control Pin Capacitance
V
IN
= 0
TSOP
7.5
9
Fine-pitch
BGA
3.9
4.7
C
IN3
WP#/ACC Pin Capacitance
V
IN
= 0
17
20
pF
Parameter Description
Test Conditions
Min
Unit
Minimum Pattern Data Retention Time
150
°
C
10
Years
125
°
C
20
Years
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