參數(shù)資料
型號: AM30LV0064DJ40
廠商: Advanced Micro Devices, Inc.
英文描述: 64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only Flash Memory with UltraNAND Technology
中文描述: 64兆位(8米× 8位)的CMOS 3.0伏特,只有UltraNAND閃存技術(shù)
文件頁數(shù): 28/41頁
文件大?。?/td> 1067K
代理商: AM30LV0064DJ40
28
Am30LV0064D
AC CHARACTERISTICS
Command, Data, and Address Input
Normal Operation
Notes:
1. Time is dependent on value of pull-up resistor at RY/BY# pin.
2. For customers using V
CCQ
> 3.6 V, t
REA
= 40 ns.
Parameter
Description
Min
Max
Unit
JEDEC
Std
t
ALS
ALE Setup Time
0
ns
t
ALH
ALE Hold Time
10
ns
t
CLS
CLE Setup Time
0
ns
t
CLH
CLE Hold Time
10
ns
t
CES
CE# Setup Time
0
ns
t
CEH
CE# Hold Time
10
ns
t
DS
Data Setup Time
20
ns
t
DH
Data Hold Time
10
ns
t
WC
Write Cycle Time
50
ns
t
WP
WE# Pulse Width
30
ns
t
WH
WE# Pulse Width High
15
ns
Parameter
Description
Min
Max
Unit
JEDEC
Std
t
ALRE
ALE to RE# Delay for Data Read
50
ns
t
AR
ALE to RE# Delay for ID and Manufacturer Read
100
ns
t
CEH
CE# Pulse Width High (to abort sequential page read latency)
100
ns
t
CELS
CE# Low to Status Output Valid
45
ns
t
CHZ
CE# High to Output High Impedance
20
t
CR
CE# Low to RE# Low
100
ns
t
CRY
CE# High to RY/BY# High (during abort of sequential page read latency)
50 + t (Note 1)
ns
t
RC
Read Cycle Time
50
ns
t
RP
RE# Pulse Width
35
ns
t
REH
RE# Pulse Width High
15
ns
t
REA
RE# Access Time for Data Read (Note 2)
35
ns
t
REA2
RE# Access Time for ID and Manufacturer Read
35
ns
t
RHZ
RE# High to Output High Impedance
15
30
ns
t
RLS
RE# Low to Status Output Valid
35
ns
t
WHR
WE# High to RE# Low
60
ns
t
OZR
Output High Impedance to RE# Low
0
ns
t
RB
Last RE# Rising Edge to RY/BY# Low
100
ns
t
RR
RY/BY# High to RE# Low
20
ns
t
WB
WE# High to RY/BY# Low
100
ns
t
R
Transfer Time from Flash Array to Data Register
7
μ
s
t
RST
Reset Time (Read/Program/Erase/after Erase Suspend)
5/10/500/5
μ
s
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