參數(shù)資料
型號: AM29PDL129H
英文描述: 8-TSSOP,PB/HALO FREE,NIPDAU LF, 1.8V(SERIAL EE)
中文描述: 128兆位(8米× 16位),3.0伏的CMOS只。頁面模式同步讀/寫閃存(高級信息)
文件頁數(shù): 53/67頁
文件大?。?/td> 635K
代理商: AM29PDL129H
August 8, 2003
Am29PDL129H
51
P R E L I M I N A R Y
AC CHARACTERISTICS
Hardware Reset (RESET#)
Note:
Not 100% tested.
Parameter
Description
All Speed Options
Unit
JEDEC
Std
t
Ready
RESET# Pin Low (During Embedded Algorithms)
to Read Mode (See Note)
Max
20
μs
t
Ready
RESET# Pin Low (NOT During Embedded
Algorithms) to Read Mode (See Note)
Max
500
ns
t
RP
RESET# Pulse Width
Min
500
ns
t
RH
Reset High Time Before Read (See Note)
Min
50
ns
t
RPD
RESET# Low to Standby Mode
Min
20
μs
t
RB
RY/BY# Recovery Time
Min
0
ns
RESET#
RY/BY#
RY/BY#
t
RP
t
Ready
Reset Timings NOT during Embedded Algorithms
t
Ready
CE1# or CE2#, OE#
t
RH
CE1# or CE2#, OE#
Reset Timings during Embedded Algorithms
RESET#
t
RP
t
RB
Figure 14.
Reset Timings
Note:
1. During CE1# transitions, CE2#= V
IH
; During CE2# transitions, CE1#= V
IH
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