參數(shù)資料
型號(hào)： AM29PDL129H
英文描述： 8-TSSOP,PB/HALO FREE,NIPDAU LF, 1.8V(SERIAL EE)
中文描述： 128兆位（8米× 16位），3.0伏的CMOS只。頁(yè)面模式同步讀/寫閃存（高級(jí)信息）
文件頁(yè)數(shù)： 5/67頁(yè)
文件大小： 635K
代理商： AM29PDL129H
August 8, 2003
Am29PDL129H
3
P R E L I M I N A R Y
TABLE OF CONTENTS
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Simultaneous Operation Block Diagram . . . . . . . 6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Am29PDL129H Device Bus Operations ...........................10
Requirements for Reading Array Data ...................................10
Random Read (Non-Page Read) ...........................................10
Page Mode Read ....................................................................10
Table 2. Page Select .......................................................................11
Simultaneous Operation .........................................................11
Table 3. Bank Select .......................................................................11
Writing Commands/Command Sequences ............................11
Accelerated Program Operation .............................................11
Autoselect Functions ..............................................................11
Automatic Sleep Mode ...........................................................12
RESET#: Hardware Reset Pin ...............................................12
Output Disable Mode ..............................................................12
Table 4. Am29PDL129H Sector Architecture ..................................13
Table 5. SecSi
TM
Sector Addresses ...............................................21
Table 6. Autoselect Codes (High Voltage Method) ........................22
Table 7. Am29PDL129H Boot Sector/Sector Block Addresses for
Protection/Unprotection
CE1# Control ...................................................................................23
Table 8. Am29PDL129H Boot Sector/Sector Block Addresses for
Protection/Unprotection
CE2# Control ...................................................................................23
Sector Protection. . . . . . . . . . . . . . . . . . . . . . . . . 24
Persistent Sector Protection ...................................................24
Persistent Protection Bit (PPB) ...............................................24
Persistent Protection Bit Lock (PPB Lock) .............................24
Dynamic Protection Bit (DYB) ................................................24
Table 9. Sector Protection Schemes ...............................................25
Persistent Sector Protection Mode Locking Bit ......................25
Password Protection Mode .....................................................25
Password and Password Mode Locking Bit ...........................26
64-bit Password ......................................................................26
Write Protect (WP#) ................................................................26
Persistent Protection Bit Lock .................................................26
High Voltage Sector Protection ..............................................27
Figure 1. In-System Sector Protection/
Sector Unprotection Algorithms...................................................... 28
Temporary Sector Unprotect ..................................................29
Figure 2. Temporary Sector Unprotect Operation........................... 29
SecSi (Secured Silicon) Sector
FlashMemoryRegion ............................................................29
Factory-Locked Area (64 words) ............................................29
Customer-Lockable Area (64 words) ......................................29
SecSi Sector Protection Bits ...................................................30
Hardware Data Protection ......................................................30
Low VCC Write Inhibit ............................................................30
Write Pulse “Glitch” Protection ...............................................30
Logical Inhibit ..........................................................................30
Power-Up Write Inhibit ............................................................30
Common Flash Memory Interface (CFI). . . . . . . 30
Command Definitions. . . . . . . . . . . . . . . . . . . . . . 34
Reading Array Data ................................................................34
Reset Command .....................................................................34
Autoselect Command Sequence ............................................34
Enter SecSi Sector/Exit SecSi Sector
Command Sequence ..............................................................34
Word Program Command Sequence ......................................35
Unlock Bypass Command Sequence .....................................35
Figure 3. Program Operation......................................................... 36
Chip Erase Command Sequence ...........................................36
Sector Erase Command Sequence ........................................36
Figure 4. Erase Operation.............................................................. 37
Erase Suspend/Erase Resume Commands ...........................37
Password Program Command ................................................37
Password Verify Command ....................................................38
Password Protection Mode Locking Bit Program Command ..38
Persistent Sector Protection Mode Locking Bit Program
Command ...............................................................................38
SecSi Sector Protection Bit Program Command ....................38
PPB Lock Bit Set Command ...................................................38
DYB Write Command .............................................................38
Password Unlock Command ..................................................39
PPB Program Command ........................................................39
All PPB Erase Command ........................................................39
DYB Write Command .............................................................39
PPB Lock Bit Set Command ...................................................39
PPB Status Command ............................................................39
PPB Lock Bit Status Command ..............................................39
Sector Protection Status Command .......................................39
Table 14. Memory Array Command Definitions .............................40
Table 15. Sector Protection Command Definitions ........................41
Write Operation Status. . . . . . . . . . . . . . . . . . . . . 42
DQ7: Data# Polling .................................................................42
Figure 5. Data# Polling Algorithm.................................................. 42
DQ6: Toggle Bit I ....................................................................43
Figure 6. Toggle Bit Algorithm........................................................ 43
DQ2: Toggle Bit II ...................................................................44
Reading Toggle Bits DQ6/DQ2 ...............................................44
DQ5: Exceeded Timing Limits ................................................44
DQ3: Sector Erase Timer .......................................................44
Table 16. Write Operation Status ...................................................45
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 46
Figure 7. Maximum Negative OvershootWaveform...................... 46
Figure 8. Maximum Positive OvershootWaveform........................ 46
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 47
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 9. Test Setup, VIO = 2.7 – 3.6 V........................................ 48
Figure 10. Input Waveforms and Measurement Levels................. 48
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 49
CE1#/CE2# Timing .................................................................49
Figure 11. Timing Diagram for Alternating Between CE1# and CE2#
Control............................................................................................ 49
Read-Only Operations ...........................................................49
Figure 12. Read Operation Timings............................................... 50
Figure 13. Page Read Operation Timings...................................... 50
Hardware Reset (RESET#) ....................................................51
Figure 14. Reset Timings............................................................... 51
Erase and Program Operations ..............................................52
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