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參數(shù)資料
| 型號： | Am29PDL128G70R |
| 廠商： | Spansion Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO Control |
| 中文描述： | 128兆位（8米× 16位/ 4米× 32位），3.0伏的CMOS只，同步讀/寫閃存與VersatileIO控制記憶 |
| 文件頁數(shù)： | 52/69頁 |
| 文件大?。?/td> | 1181K |
| 代理商： | AM29PDL128G70R |
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July 29, 2002
Am29PDL128G
51
P R E L I M I N A R Y
TEST CONDITIONS
Table 19.
Test Specifications
KEY TO SWITCHING WAVEFORMS
2.7 k
C
L
6.2 k
3.3 V
Device
Under
Test
Note:
Diodes are IN3064 or equivalent
Figure 9.
Test Setup
Test Condition
70R, 70, 80, 90
Unit
Output Load
1 TTL gate
Output Load Capacitance, C
L
(including jig capacitance)
30
pF
Input Rise and Fall Times
5
ns
Input Pulse Levels
0.0
–
3.0
V
Input timing measurement
reference levels
1.5
V
Output timing measurement
reference levels
1.5
V
KS000010-PAL
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don
’
t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
3.0 V
0.0 V
1.5 V
1.5 V
Output
Measurement Level
Input
Figure 10.
Input Waveforms and Measurement Levels
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