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參數(shù)資料
| 型號： | AKD4353VF |
| 英文描述： | Consumer IC |
| 中文描述： | 消費(fèi)性IC |
| 文件頁數(shù)： | 4/33頁 |
| 文件大?。?/td> | 251K |
| 代理商： | AKD4353VF |
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ASAHI KASEI
[AK4353]
MS0016-E-02
2001/05
- 4 -
PIN/FUNCTION
No.
1
Pin Name
MCKO
I/O
O
Description
Master Clock Output Pin
Same frequency as MCKI is output
Transmit Channel Output Pin
Digital Power Supply Pin, +2.7
～
+5.5V
Digital Ground Pin, 0V
Master Clock Input Pin
Serial Data Clock Pin
Serial Data Input Pin
Serial Input Channel Clock Pin
Power-Down Pin
When “L”, the circuit is in power-down mode.
The AK4353 should always be reset upon power-up.
Chip Select Pin at 3-wire Serial control mode
This pin should be connected to DVDD at I
2
C Bus control mode.
Control Clock Pin at I
2
C bus control mode
Control Clock Pin at 3-wire serial control mode
Control Data Input/Output Pin at I
2
C Bus control mode
Control Data Input Pin at 3-wire serial control mode
Test pin
This pin should be connected to DVDD.
Digital Input Level Select Pin
“L”: CMOS, “H”: TTL
Control Mode Select Pin
“L”: 3-wire Serial, “H”: I
2
C Bus
Chip Address Select 0 Pin
Chip Address Select 1 Pin
Rch Analog Output Pin
Lch Analog Output Pin
Common Voltage Output Pin, AVDD/2
Used for analog common voltage.
Large external capacitor is used to reduce power supply noise.
Analog Ground Pin
Analog Power Supply Pin
No Connect
Nothing should be connected externally to this pin.
Zero Input Detect Pin
When SDTI follows a total 8192 LRCK cycles with “0” input data
or RSTN = “0”, this pin goes to “H”.
2
3
4
5
6
7
8
9
TX
DVDD
DVSS
MCKI
BICK
SDTI
LRCK
PDN
O
-
-
I
I
I
I
I
10
CSN
I
SCL
CCLK
SDA
CDTI
TST
I
I
11
I/O
I
I
12
13
14
TTL
I
15
I2C
I
16
17
18
19
20
CAD0
CAD1
AOUTR
AOUTL
VCOM
I
I
O
O
O
21
22
23
AVSS
AVDD
NC
-
-
-
24
DZF
O
Note: No input pins should be left floating.
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