ASAHI KASEI
[AK4532]
0178-E-02
10
2004/12
OPERATION OVERVIW
1. CONTROL REGISTER MAP
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00
Master Volume Lch
MUTE
ATT4
ATT3
ATT2
ATT1
ATT0
01
Master Volume Rch
MUTE
ATT4
ATT3
ATT2
ATT1
ATT0
02
Voice Volume Lch
MUTE
GAI4
GAI3
GAI2
GAI1
GAI0
03
Voice Volume Rch
MUTE
GAI4
GAI3
GAI2
GAI1
GAI0
08
Line Volume Lch
MUTE
GAI4
GAI3
GAI2
GAI1
GAI0
09
Line Volume Rch
MUTE
GAI4
GAI3
GAI2
GAI1
GAI0
0A
AUX Volume Lch
MUTE
GAI4
GAI3
GAI2
GAI1
GAI0
0B
AUX Volume Rch
MUTE
GAI4
GAI3
GAI2
GAI1
GAI0
10
Output Mixer SW 1
LineL
LineR
MIC
11
Output Mixer SW 2
AUXL
AUXR
VoiceL
VoiceR
12
Lch Input Mixer SW 1
LineL
LineR
13
Rch Input Mixer SW 1
LineL
LineR
14
Lch Input Mixer SW 2
AUXL
AUXR
VoiceL
15
Rch Input Mixer SW 2
AUXL
AUXR
VoiceR
16
Reset and Power Down
PD
RST
19
MIC Amp Gain
MGAIN
Note: ATT* is data bits for the attenuation level.
GAI* is data bits for the gain level.
IMPORTANT: There is the compatibility between the AK4531 and AK4532. But the input mixer
functions of those device has some different implication in the application, receptively.
And the other address of control register except those described in the above table and “1A” are
“do not care”. Address “1A” for testing shall be strictly prohibited to access.
Be ware that the three MSB address bits(A7, A6, A5) are ignored by AK4532. Writing to address
“20” register will update the address “00” register for instance.
2. WRITE Timing of Control Register
CS
CCLK
1
A7-A0:
Address
D7-D0:
Control Data
3
4
567
9
10
11
12
13
14
15
28
CDATA
D0
D1
D2
D3
D4
D5
D6
A0
A1
A2
A3
A4
A6
A7
A5
D7
0
3. Control Register Definitions
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00
Master Volume Lch
MUTE
ATT4
ATT3
ATT2
ATT1
ATT0
01
Master Volume Rch
MUTE
ATT4
ATT3
ATT2
ATT1
ATT0
MUTE
1:
MUTE
0:
No MUTE
ATT4:0
32 levels with 2 dB step
00000: 0dB
11111: -62 dB
Initial
“0000 0000”(No MUTE & 0dB)