參數(shù)資料
型號： AGLE600V5-FFGG256C
元件分類： FPGA
英文描述： FPGA, 13824 CLBS, 600000 GATES, PBGA256
封裝： 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-256
文件頁數(shù)： 140/156頁
文件大小： 5023K
代理商： AGLE600V5-FFGG256C
IGLOOe DC and Switching Characteristics
2- 70
Advance v0.3
Table 2-114 Parameter Definition and Measuring Nodes
Parameter Name
Parameter Definition
Measuring Nodes
(from, to)*
tOCLKQ
Clock-to-Q of the Output Data Register
HH, DOUT
tOSUD
Data Setup Time for the Output Data Register
FF, HH
tOHD
Data Hold Time for the Output Data Register
FF, HH
tOSUE
Enable Setup Time for the Output Data Register
GG, HH
tOHE
Enable Hold Time for the Output Data Register
GG, HH
tOCLR2Q
Asynchronous Clear-to-Q of the Output Data Register
LL, DOUT
tOREMCLR
Asynchronous Clear Removal Time for the Output Data Register
LL, HH
tORECCLR
Asynchronous Clear Recovery Time for the Output Data Register
LL, HH
tOECLKQ
Clock-to-Q of the Output Enable Register
HH, EOUT
tOESUD
Data Setup Time for the Output Enable Register
JJ, HH
tOEHD
Data Hold Time for the Output Enable Register
JJ, HH
tOESUE
Enable Setup Time for the Output Enable Register
KK, HH
tOEHE
Enable Hold Time for the Output Enable Register
KK, HH
tOECLR2Q
Asynchronous Clear-to-Q of the Output Enable Register
II, EOUT
tOEREMCLR
Asynchronous Clear Removal Time for the Output Enable Register
II, HH
tOERECCLR
Asynchronous Clear Recovery Time for the Output Enable Register
II, HH
tICLKQ
Clock-to-Q of the Input Data Register
AA, EE
tISUD
Data Setup Time for the Input Data Register
CC, AA
tIHD
Data Hold Time for the Input Data Register
CC, AA
tISUE
Enable Setup Time for the Input Data Register
BB, AA
tIHE
Enable Hold Time for the Input Data Register
BB, AA
tICLR2Q
Asynchronous Clear-to-Q of the Input Data Register
DD, EE
tIREMCLR
Asynchronous Clear Removal Time for the Input Data Register
DD, AA
tIRECCLR
Asynchronous Clear Recovery Time for the Input Data Register
DD, AA
* See Figure 2-27 on page 2-69 for more information.
相關(guān)PDF資料
PDF描述
AGLE600V5-FFGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
AGLE600V5-FG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
AGLE600V5-FGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AGLE600V5-FFGG484 制造商:Microsemi Corporation 功能描述:FPGA IGLOOE 600K GATES 130NM 1.5V 484FBGA - Trays
AGLE600V5-FFGG896 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V5-FFGG896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V5-FFGG896I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V5-FFGG896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
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