IGLOO Low Power Flash FPGAs
Revision 23
2-73
Table 2-125 1.5 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.4 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
1.55
6.35
0.26
1.22
1.10
6.46
5.93
2.40
2.46
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values. Table 2-126 1.5 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 1.4 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
1.55
2.92
0.26
1.22
1.10
2.96
2.60
2.40
2.56
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values.